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SMBJ12AON 数据表(PDF) 4 Page - ON Semiconductor

部件名 SMBJ12AON
功能描述  600 Watt Peak Power Zener Transient Voltage Suppressor
Download  6 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

SMBJ12AON 数据表(HTML) 4 Page - ON Semiconductor

  SMBJ12AON Datasheet HTML 1Page - ON Semiconductor SMBJ12AON Datasheet HTML 2Page - ON Semiconductor SMBJ12AON Datasheet HTML 3Page - ON Semiconductor SMBJ12AON Datasheet HTML 4Page - ON Semiconductor SMBJ12AON Datasheet HTML 5Page - ON Semiconductor SMBJ12AON Datasheet HTML 6Page - ON Semiconductor  
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SMBJ12AON
http://onsemi.com
4
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMB series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
DUTY CYCLE DERATING
If the duty cycle increases, the peak power must be
reduced as indicated by the curves of Figure 7. Average
power must be derated as the lead or ambient temperature
rises above 25
°C. The average power derating curve
normally given on data sheets may be normalized and used
for this purpose.
VL
V
Vin
Vin (TRANSIENT)
VL
td
V
Vin (TRANSIENT)
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t
t
Figure 5.
Figure 6.
Figure 7. Typical Derating Factor for Duty Cycle
1 ms
10
ms
1
0.7
0.5
0.3
0.05
0.1
0.2
0.01
0.02
0.03
0.07
100
ms
0.1 0.2
0.5
2
5
10
50
1
20
100
D, DUTY CYCLE (%)
PULSE WIDTH
10 ms


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