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AZT530 数据表(PDF) 1 Page - Power Semiconductors

部件名 AZT530
功能描述  HIGH CURRENT PHASE CONTROL
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制造商  POSEICO [Power Semiconductors]
网页  http://www.poseico.com
标志 POSEICO - Power Semiconductors

AZT530 数据表(HTML) 1 Page - Power Semiconductors

  AZT530 Datasheet HTML 1Page - Power Semiconductors AZT530 Datasheet HTML 2Page - Power Semiconductors AZT530 Datasheet HTML 3Page - Power Semiconductors AZT530 Datasheet HTML 4Page - Power Semiconductors  
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HIGH CURRENT PHASE CONTROL
AZT530
THYRISTOR INSULATED MODULE
Repetitive voltage up to
3600 V
Mean forward current
532 A
Surge current
17 kA
FINAL SPECIFICATION
May 17 - Issue: 3
Symbol
Characteristic
Conditions
Tj
[°C]
Value
Unit
BLOCKING
V RRM
Repetitive peak reverse voltage
125
3600
V
V RSM
Non-repetitive peak reverse voltage
125
3700
V
V DRM
Repetitive peak off-state voltage
125
3600
V
I RRM
Repetitive peak reverse current
125
100
mA
I DRM
Repetitive peak off-state current
125
100
mA
CONDUCTING
I T (AV)
Mean forward current
180° sin, 50 Hz, Tc=55°C, double side cooled
799
A
I T (AV)
Mean forward current
180° sin, 50 Hz, Tc=85°C, double side cooled
532
A
I TSM
Surge forward current
Sine wave, 10 ms
125
17
kA
I² t
I² t
without reverse voltage
1445 x 10
3
A²s
V T
On-state voltage
On-state current =
1800 A
25
2,21
V
V T(TO)
Threshold voltage
125
1,20
V
r T
On-state slope resistance
125
0,450
mohm
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 1050 A; gate 10V, 5
W
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
125
500
V/µs
t d
Gate controlled delay time, typical
VD=100V; gate source 25V, 10
W , tr=.5 µs
25
1
µs
t q
Circuit commutated turn-off time, typical
dv/dt = 20 V/µs linear up to 75% VDRM
200
µs
Q rr
Reverse recovery charge
di/dt = -20 A/µs, I= 700 A
125
µC
I rr
Peak reverse recovery current
VR= 50 V
A
I H
Holding current, typical
VD=5V, gate open circuit
25
300
mA
I L
Latching current, typical
VD=5V, tp=30µs
25
700
mA
GATE
V GT
Gate trigger voltage
VD=5V
25
3,50
V
I GT
Gate trigger current
VD=5V
25
300
mA
V GD
Non-trigger gate voltage, min.
VD=VDRM
125
0,25
V
V FGM
Peak gate voltage (forward)
30
V
I FGM
Peak gate current
10
A
V RGM
Peak gate voltage (reverse)
5
V
P GM
Peak gate power dissipation
Pulse width 100 µs
150
W
P G
Average gate power dissipation
2
W
MOUNTING
R th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
42,0
°C/kW
R th(c-h)
Thermal impedance
Case to heatsink, double side cooled
20
°C/kW
T j
Operating junction temperature
-30 / 125
°C
F
Mounting force
04,0 / 06,0
kN
Mass
2800
g
ORDERING INFORMATION : AZT530 S 36
standard specification
VRRM/100
POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - sales@poseico.com


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