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MT9V032 数据表(PDF) 14 Page - ON Semiconductor |
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MT9V032 数据表(HTML) 14 Page - ON Semiconductor |
14 / 61 page MT9V032 www.onsemi.com 14 TWO−WIRE SERIAL INTERFACE SAMPLE READ AND WRITE SEQUENCES 16−Bit Write Sequence A typical write sequence for writing 16 bits to a register is shown in Figure 9. A start bit given by the master, followed by the write address, starts the sequence. The image sensor then gives an acknowledge bit and expects the register address to come first, followed by the 16−bit data. After each 8−bit word is sent, the image sensor gives an acknowledge bit. All 16 bits must be written before the register is updated. After 16 bits are transferred, the register address is automatically incremented, so that the next 16 bits are written to the next register. The master stops writing by sending a start or stop bit. Figure 9. Timing Diagram Showing a Write to R0x09 with Value 0x0284 SCLK START ACK 0xB8 ADDR 0000 0010 R0x09 ACK ACK ACK STOP 1000 0100 SDATA 16−Bit Read Sequence A typical read sequence is shown in Figure 10. First the master has to write the register address, as in a write sequence. Then a start bit and the read address specify that a read is about to happen from the register. The master then clocks out the register data 8 bits at a time. The master sends an acknowledge bit after each 8−bit transfer. The register address is auto−incremented after every 16 bits is transferred. The data transfer is stopped when the master sends a no−acknowledge bit. Figure 10. Timing Diagram Showing a Read from R0x09; Returned Value 0x0284 SCLK START ACK 0xB8 ADDR 0xB9 ADDR 0000 0010 R0x09 ACK ACK ACK STOP 1000 0100 NACK SDATA 8−Bit Write Sequence To be able to write 1 byte at a time to the register, a special register address is added. The 8−bit write is done by first writing the upper 8 bits to the desired register and then writing the lower 8 bits to the special register address (R0xF0). The register is not updated until all 16 bits have been written. It is not possible to just update half of a register. In Figure 11, a typical sequence for 8−bit writing is shown. The second byte is written to the special register (R0xF0). Figure 11. Timing Diagram Showing a Bytewise Write to R0x09 with Value 0x0284 STOP ACK START 0xB8 ADDR ACK SCLK ACK ACK ACK ACK R0x09 0xB8 ADDR 0000 0010 1000 0100 START SDATA R0xF0 8−Bit Read Sequence To read one byte at a time the same special register address is used for the lower byte. The upper 8 bits are read from the desired register. By following this with a read from the special register (R0xF1) the lower 8 bits are accessed (Figure 12). The master sets the no−acknowledge bits shown. |
类似零件编号 - MT9V032_17 |
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类似说明 - MT9V032_17 |
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