数据搜索系统,热门电子元器件搜索 |
|
AD7982BCPZ-RL 数据表(PDF) 5 Page - Analog Devices |
|
AD7982BCPZ-RL 数据表(HTML) 5 Page - Analog Devices |
5 / 26 page AD7982 Data Sheet Rev. D | Page 4 of 25 VDD = 2.5 V, VIO = 1.71 V to 5.5 V, VREF = 5 V, TA = −40°C to +85°C, unless otherwise noted. Table 3. Parameter Test Conditions/Comments Min Typ Max Unit REFERENCE Voltage Range 2.4 5.1 V Load Current 1 MSPS, VREF = 5 V 350 μA SAMPLING DYNAMICS −3 dB Input Bandwidth 10 MHz Aperture Delay VDD = 2.5 V 2 ns DIGITAL INPUTS Logic Levels VIL VIO > 3 V –0.3 +0.3 × VIO V VIH VIO > 3 V 0.7 × VIO VIO + 0.3 V VIL VIO ≤ 3 V –0.3 +0.1 × VIO V VIH VIO ≤ 3 V 0.9 × VIO VIO + 0.3 V IIL −1 +1 μA IIH −1 +1 μA DIGITAL OUTPUTS Data Format Serial 18 bits, twos complement Pipeline Delay Conversion results available immediately after completed conversion VOL ISINK = +500 μA 0.4 V VOH ISOURCE = −500 μA VIO − 0.3 V POWER SUPPLIES VDD 2.375 2.5 2.625 V VIO 1.71 5.5 V Standby Current1, 2 VDD and VIO = 2.5 V, 25°C 0.35 μA Power Dissipation VDD = 2.625 V, VREF = 5 V, VIO = 3 V Total 10 kSPS throughput 70 86 μW 1 MSPS throughput 7 8.6 mW VDD Only 4 mW REF Only 1.7 mW VIO Only 1.3 mW Energy per Conversion 7.0 nJ/sample TEMPERATURE RANGE3 Specified Performance TMIN to TMAX −40 +85 °C 1 With all digital inputs forced to VIO or GND as required. 2 During acquisition phase. 3 Contact an Analog Devices, Inc., sales representative for the extended temperature range. |
类似零件编号 - AD7982BCPZ-RL |
|
类似说明 - AD7982BCPZ-RL |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |