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AD7889 数据表(PDF) 19 Page - Analog Devices |
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AD7889 数据表(HTML) 19 Page - Analog Devices |
19 / 40 page Data Sheet AD7879/AD7889 Rev. D | Page 19 of 40 GPIO Interrupt Enable (Bit 12, Control Register 3, Address 0x03) The GPIO pin can operate as an interrupt source to trigger the INT output. This is controlled by Bit 12 in Control Register 3. If the GPIO ALERT interrupt enable bit is set to 0, the GPIO can trigger INT. If this bit is set to 1, the GPIO cannot trigger INT. INT is asserted if the GPIO data register bit is set when the GPIO is configured as an input, provided that INT is enabled. INT is triggered only when the GPIO is configured as an input, that is, when GPIO DIR = 1. INT is cleared only when the GPIO signal or the GPIO enable bit changes. |
类似零件编号 - AD7889 |
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类似说明 - AD7889 |
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