AD7147PACPZ-500R7 datasheet(7/71 Pages) AD

部件名	AD7147PACPZ-500R7

功能描述	CapTouch Programmable Controller

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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AD7147

Data Sheet

SPI TIMING SPECIFICATIONS (AD7147)

TA = −40°C to +85°C, sample tested at 25°C to ensure compliance. VDRIVE = 1.65 V to 3.6 V, and VCC = 2.6 V to 3.6 V, unless otherwise

noted. All input signals are specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V.

Table 4. SPI Timing Specifications

Parameter

Limit

Unit

Description

fSCLK

5

MHz max

SCLK frequency

t1

5

ns min

CS falling edge to first SCLK falling edge

t2

20

ns min

SCLK high pulse width

t3

20

ns min

SCLK low pulse width

t4

15

ns min

SDI setup time

t5

15

ns min

SDI hold time

t6

20

ns max

SDO access time after SCLK falling edge

t7

16

ns max

CS rising edge to SDO high impedance

t8

15

ns min

SCLK rising edge to CS high

SPI Timing Diagram

CS

SCLK

SDI

SDO

t1

1

16

15

MSB

LSB

2

3

MSB

LSB

1

2

15

16

t2

t4

t5

t3

t6

t7

t8

Figure 2. SPI Detailed Timing Diagram

Rev. E | Page 6 of 70

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