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AD7147 数据表(PDF) 39 Page - Analog Devices |
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AD7147 数据表(HTML) 39 Page - Analog Devices |
39 / 71 page AD7147 Data Sheet Rev. E | Page 38 of 70 SDA DEV A6 DEV A5 DEV A4 R/W A7 A6 SCLK DEV A3 A1 A0 1 26 234 17 18 19 20 25 DEV A2 DEV A1 DEV A0 ACK A15 A14 11 16 5 678 910 AD7147-1 DEVICE ADDRESS A9 A8 REGISTER ADDRESS [A15:A8] REGISTER ADDRESS [A7:A0] ACK 35 28 30 34 37 36 44 38 45 D1 D0 D7 D6 SR ACK 46 P DEV A6 DEV A5 DEV A4 12 3 t8 t7 t6 t5 t4 t2 t1 t3 AD7147-1 DEVICE ADDRESS ACK 27 AD7147-1 DEVICE ADDRESS DEV A6 DEV A5 DEV A1 DEV A0 R/W 29 39 35 28 30 34 37 36 44 38 45 D1 D0 D7 D6 S ACK 46 P t5 t4 AD7147-1 DEVICE ADDRESS DEV A6 DEV A5 DEV A1 DEV A0 R/W 29 39 P USING REPEATED START SEPARATE READ AND WRITE TRANSACTIONS ACK ACK START REGISTER DATA [D7:D0] REGISTER DATA [D7:D0] NOTES 1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCLK REMAINS HIGH. 2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCLK REMAINS HIGH. 3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA. 4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB Xs ARE DON'T CARE BITS. 5. 16-BIT REGISTER ADDRESS [A15:A0] = [X, X, X, X, X, X, A9, A8, A7, A6, A5, A4, A3, A2, A1, A0], WHERE THE UPPER LSB Xs ARE DON’T CARE BITS. 6. REGISTER ADDRESS [A15:A8] AND REGISTER ADDRESS [A7:A0] ARE ALWAYS SEPARATED BY LOW ACK BITS. 7. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT. 8. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION. Figure 54. Example of I2C Timing for Single Register Readback Operation WRITE OUTPUT FROM MASTER S P P ACK = NO ACKNOWLEDGE BIT W READ (USING REPEATED START) S W P READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS) S W P S ACK ACK OUTPUT FROM AD7147-1 S = START BIT P = STOP BIT SR = REPEATED START BIT ACK = ACKNOWLEDGE BIT 6-BIT DEVICE ADDRESS REGISTER ADDR [15:8] REGISTER ADDR [7:0] WRITE DATA HIGH BYTE [15:8] WRITE DATA LOW BYTE [7:0] WRITE DATA HIGH BYTE [15:8] WRITE DATA LOW BYTE [7:0] READ DATA HIGH BYTE [15:8] READ DATA LOW BYTE [7:0] READ DATA HIGH BYTE [15:8] READ DATA LOW BYTE [7:0] 6-BIT DEVICE ADDRESS REGISTER ADDR LOW BYTE REGISTER ADDR HIGH BYTE 6-BIT DEVICE ADDRESS READ DATA LOW BYTE [7:0] READ DATA HIGH BYTE [15:8] READ DATA LOW BYTE [7:0] READ DATA HIGH BYTE [15:8] 6-BIT DEVICE ADDRESS REGISTER ADDR LOW BYTE REGISTER ADDR HIGH BYTE 6-BIT DEVICE ADDRESS Figure 55. Example of Sequential I2C Write and Readback Operations VDRIVE INPUT The supply voltage for the pins (SDO, SDI, SCLK, SDA, CS, INT, and GPIO) associated with both the I2C and SPI serial interfaces is supplied from the VDRIVE pin and is separate from the main VCC supply. This allows the AD7147 to be connected directly to processors whose supply voltage is less than the minimum operating voltage of the AD7147 without the need for external level- shifters. The VDRIVE pin can be connected to voltage supplies as low as 1.65 V and as high as VCC. |
类似零件编号 - AD7147_17 |
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类似说明 - AD7147_17 |
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