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AD7143 数据表(PDF) 6 Page - Analog Devices |
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AD7143 数据表(HTML) 6 Page - Analog Devices |
6 / 57 page AD7143 Rev. 0 | Page 5 of 56 I2C TIMING SPECIFICATIONS TA = −40°C to +85°C, VCC = 2.6 V to 3.6 V, unless otherwise noted. Sample tested at 25°C to ensure compliance. All input signals timed from a voltage level of 1.6 V. Table 4. I2C Timing Specifications1 Parameter Limit Unit Description fSCLK 400 kHz max t1 0.6 μs min Start condition hold time, tHD; STA t2 1.3 μs min Clock low period, tLOW t3 0.6 μs min Clock high period, tHIGH t4 100 ns min Data setup time, tSU; DAT t5 300 ns min Data hold time, tHD; DAT t6 0.6 μs min Stop condition setup time, tSU; STO t7 0.6 μs min Start condition setup time, tSU; STA t8 1.3 μs min Bus free time between stop and start conditions, tBUF tR 300 ns max Clock/data rise time tF 300 ns max Clock/data fall time 1 Guaranteed by design, not production tested. 200µA IOL 200µA IOH 1.6V TO OUTPUT PIN CL 50pF Figure 2. Load Circuit for Digital Output Timing Specifications |
类似零件编号 - AD7143 |
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类似说明 - AD7143 |
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