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AD5171 数据表(PDF) 6 Page - Analog Devices |
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AD5171 数据表(HTML) 6 Page - Analog Devices |
6 / 20 page AD5171 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS TOP VIEW (Not to Scale) 8 7 6 5 1 2 3 4 W VDD GND SCL A B AD0 SDA AD5171 Figure 4. SOT-23-8 Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 W Wiper Terminal W. GND ≤ VW ≤ VDD. 2 VDD Positive Power Supply. Specified for operation from 2.7 V to 5.5 V. For OTP programming, VDD needs to be a minimum of 6 V and 100 mA driving capability. 3 GND Common Ground. 4 SCL Serial Clock Input. Requires pull-up resistor. 5 SDA Serial Data Input/Output. Requires pull-up resistor. 6 AD0 I2C Device Address Bit. Allows maximum of two AD5171s to be addressed. 7 B Resistor Terminal B. GND ≤ VB ≤ VDD. 8 A Resistor Terminal A. GND ≤ VA ≤ VDD. Rev. PrC | Page 6 of 20 Preliminary Technical Data |
类似零件编号 - AD5171 |
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类似说明 - AD5171 |
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