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AD9467BCPZ-250 数据表(PDF) 5 Page - Analog Devices |
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AD9467BCPZ-250 数据表(HTML) 5 Page - Analog Devices |
5 / 34 page Data Sheet AD9467 Rev. D | Page 3 of 32 SPECIFICATIONS AVDD1 = 1.8 V, AVDD2 = 3.3 V, AVDD3 = 1.8 V, DRVDD = 1.8 V, specified maximum sampling rate, 2.5 V p-p differential input, 1.25 V internal reference, AIN = −1.0 dBFS, DCS on, default SPI settings, unless otherwise noted. Table 1. AD9467BCPZ-200 AD9467BCPZ-250 Parameter1 Temp Min Typ Max Min Typ Max Unit RESOLUTION 16 16 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Offset Error Full −150 0 +150 −150 0 +150 LSB Gain Error Full −3.5 −0.2 +2.5 −3.5 −0.1 +2.5 %FSR Differential Nonlinearity (DNL)2 Full −0.8 ±0.4 +0.7 −0.6 ±0.5 +1.3 LSB Integral Nonlinearity (INL)2 Full −9.5 ±5 +9.5 −11.8 ±3.5 +9.5 LSB TEMPERATURE DRIFT Offset Error Full ±0.020 ±0.023 %FSR/°C Gain Error Full ±0.011 ±0.036 %FSR/°C ANALOG INPUTS Differential Input Voltage Range (Internal VREF = 1 V to 1.25 V) Full 2 2.5 2.5 2 2.5 2.5 V p-p Common-Mode Voltage 25°C 2.3 2.15 V Differential Input Resistance 25°C 530 530 Ω Differential Input Capacitance 25°C 3.5 3.5 pF Full Power Bandwidth 25°C 900 900 MHz XVREF INPUT Input Voltage Full 1 1.25 1 1.25 V Input Capacitance Full 3 3 pF POWER SUPPLY AVDD1 Full 1.75 1.8 1.85 1.75 1.8 1.85 V AVDD2 Full 3.0 3.3 3.6 3.0 3.3 3.6 V AVDD3 Full 1.7 1.8 1.9 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V IAVDD1 Full 485 536 580 514 567 618 mA IAVDD2 Full 49 55 61 49 55 61 mA IAVDD3 Full 21 24 27 27 31 35 mA IDRVDD Full 35 38 41 36 40 43 mA Total Power Dissipation (Including Output Drivers) Full 1.14 1.26 1.37 1.2 1.33 1.45 W Power-Down Dissipation Full 4.4 90 4.4 90 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed. 2 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. |
类似零件编号 - AD9467BCPZ-250 |
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类似说明 - AD9467BCPZ-250 |
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