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CDB61575 数据表(PDF) 8 Page - Cirrus Logic

部件名 CDB61575
功能描述  T1/E1 LINE INTERFACE
Download  44 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CDB61575 数据表(HTML) 8 Page - Cirrus Logic

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THEORY OF OPERATION
CS61577 Enhancements Relative to CS61574
Existing designs using the CS61574 can be con-
verted to the higher performance, pin-compatible
CS61577 with no changes to the PCB, external
component or system software.
The CS61577 provides higher performance and
more features than the CS61574 including:
• Selection of 75 Ω or 120 Ω E1 output op-
tions under software or hardware control,
• 50 mARMS transmitter short-circuit current
limiting for E1 (per OFTEL OTR-001),
internally controlled pulse width for E1
output options,
• 35% lower power consumption,
• Increased transmitter immunity to signal re-
flections for improved signal quality,
• Optional AMI, B8ZS, HDB3 encoder/de-
coder or external line coding support,
• Receiver AIS (unframed all ones) detection,
• Improved receiver Loss of Signal handling
(LOS set at power-up, reset upon receipt of
3 ones in 32 bit periods with no more than
15 consecutive zeros),
• Transmitter TTIP and TRING outputs are
forced low when TCLK is static,
• The Driver Performance Monitor operates
over a wider range of input signal levels.
Introduction to Operating Modes
The CS61577 supports three operating modes
which are selected by the level of the MODE pin
as shown in Tables 1 and 2, Figure 7, and Figures
A1-A3 of the Applications section.
The modes are Hardware Mode, Extended Hard-
ware Mode, and Host Mode. In Hardware and
Extended Hardware Modes, discrete pins are used
to configure and monitor the device. The Ex-
tended Hardware Mode provides a parallel chip
select input which latches the control inputs al-
lowing individual ICs to be configured using a
common set of control lines. In the Host Mode,
an external processor monitors and configures the
device through a serial interface. There are thir-
teen multi-function pins whose functionality is
determined by the operating mode. (see Table 2).
Hardware
Mode
Extended
Hardware
Mode
Host
Mode
Control
Method
Control
Pins
Control Pins
with Parallel
Chip Select
Serial
Interface
MODE
Pin
Level
<0.2 V
Floating or
2.5 V
>(RV+)-0.2 V
Line
Coding
External
Internal-
AMI, B8ZS,
or HDB3
External
AIS
Detection
No
Yes
No
Driver
Performance
Monitor
Yes
No
Yes
Table 1. Differences Between Operating Modes
MODE
FUNCTION
PIN HARDWARE
EXTENDED
HARDWARE
HOST
TRANSMITTER
3TPOS
TDATA
TPOS
4TNEG
TCODE
TNEG
RECEIVER/DPM
6
RNEG
BPV
RNEG
7RPOS
RDATA
RPOS
11
DPM
AIS
DPM
17
MTIP
RCODE
MTIP
18
MRING
-
MRING
CONTROL
18
-
PCS
-
23
LEN0
LEN0
INT
24
LEN1
LEN1
SDI
25
LEN2
LEN2
SDO
26
RLOOP
RLOOP
CS
27
LLOOP
LLOOP
SCLK
28
TAOS
TAOS
CLKE
Table 2. Pin Definitions
CS61577
8
DS155PP2


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