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RT2910A 数据表(PDF) 14 Page - Richtek Technology Corporation

部件名 RT2910A
功能描述  High Efficiency Inverting PWM Converter with Surge Stopper
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制造商  RICHTEK [Richtek Technology Corporation]
网页  http://www.richtek.com
标志 RICHTEK - Richtek Technology Corporation

RT2910A 数据表(HTML) 14 Page - Richtek Technology Corporation

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RT2910A
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
DS2910A-00
August
2017
14
0.6V
0.2V
OCP/OVP
Trigger Signal
VTMR
VGATE to OUT
VFDLY
VPOK
1.25V
Figure 1. OCP/OVP Fault Sequence
If the fault condition persist, fault sequence as Figure 2.
CFDLY is charge to 1.25V POK (ENHV) , GATE pull high.
HV switch is operation, but fault condition is still exist,
CTMR is charge to 1.45V within 3ms TMR blank time.
POK (ENHV) , GATE pull low again. CTMR is discharge
by 3.5uA until 3ms time out. Because POK (ENHV) pull
low, so VTMR is discharged to 0.2V, CFDLY start charge
again.
0.6V
0.2V
OCP/OVP
Trigger Signal
TMR
GATE TO OUT
FDLY
POK
1.25V
3ms TMR blank time
1.45V
3.5uA discharge
Decay Down
25uA charge CTMR
Figure 2. OCP/OVP Fault Condition Persist Sequence
MOSEFT Selection
The N-Channel MOSFET load switch is the critical
component for the protection circuit. Choosing an
appropriate device is not difficult but there are many
important requirements. The most important are :
on-resistance (RDS(ON))
maximum current rating
maximum drain-source voltage
maximum gate-source voltage
power dissipation and safe operating area (SOA)
gate threshold (for lower VIN applications)
For most of the time the MOSFET will be fully on. In that
state, the voltage loss and power dissipation are a
simple matter of RDS(ON) and current. Choose a device
that doesn’t drop more voltage than is acceptable
considering the minimum value the intended input
voltage and the voltage requirements of the load, and
one that can handle the required continuous current.
Avoid logic-level
MOSFETs with their low VGS
maximum ratings, or add a GATE-VOUT clamp to avoid
damaging. The RT2910A GATE drive voltage may be
as high as 14V so standard-threshold MOSFETs with
20V VGS ratings are recommended.
When the MOSFET is turned off (whether in shutdown
or in OVP or OCP) the full input voltage appears across
the MOSFET. Choose a MOSFET with a maximum
drain-source voltage exceeding your maximum input
surge voltage.
During an over-voltage (OV) event the MOSFET will
linear regulate the output voltage delivered to the load.
According to the timing determined by the capacitor
connected at the TMR pin, the circuit will turn the load
on and off periodically until the over-voltage ends. While
linear-regulating, the MOSFET will dissipate power and
heat up. Since TMR charges at twice the rate that it
discharges, the MOSFET will linear regulate with a duty
cycle of about 12% during a long continuous OV event.
If the OV event is shorter than the TMR charge timing
then examine the MOS ET’s safe operating area (SOA)
graph, using (VHV – VOUT) for MOSFET drain to source
voltage and ILOAD(VOUT)
for
the
drain
current, to
determine if the over-voltage event will cause MOSFET
damage. It may be helpful to adjust CTMR to meet the
MOS ET’s SOA limits.
If the OV event lasts more than one TMR cycle then the
MOSFET will turn on and off, dissipating power each
time it is on and linear regulating and cooling down
when it is off. In this case, use one of the longer-timed
areas of the SOA graph but adjust
the
drain current
value by the 12% duty cycle of the MOSFET on periods
determine if the MOSFET will work. For thermal
management, the MOSFET dissipation during long
over-voltage events is :
PDMOSFET(OV) = DC x (VHV – VOUT) x ILOAD(VOUT)
where DC is the duty cycle of linear regulation, typically
about 12%.


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