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74LVC2G86DC 数据表(PDF) 1 Page - NXP Semiconductors |
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74LVC2G86DC 数据表(HTML) 1 Page - NXP Semiconductors |
1 / 15 page 1. General description The 74LVC2G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC2G86 provides the dual 2-input exclusive-OR gate. 2. Features s Wide supply voltage range from 1.65 V to 5.5 V s 5 V tolerant inputs for interfacing with 5 V logic s Inputs accept voltages up to 5 V s Direct interface with TTL levels s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 mA output drive (V CC = 3.0 V) s CMOS low-power consumption s Latch-up performance exceeds 250 mA s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V s Multiple package options s Specified from −40 °C to +85 °C and −40 °C to +125 °C 74LVC2G86 Dual 2-input exclusive-OR gate Rev. 03 — 7 February 2005 Product data sheet |
类似零件编号 - 74LVC2G86DC |
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类似说明 - 74LVC2G86DC |
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