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EP1K10 数据表(PDF) 84 Page - List of Unclassifed Manufacturers |
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EP1K10 数据表(HTML) 84 Page - List of Unclassifed Manufacturers |
84 / 86 page 84 Altera Corporation ACEX 1K Programmable Logic Device Family Data Sheet During initialization, which occurs immediately after configuration, the device resets registers, enables I/O pins, and begins to operate as a logic device. Before and during configuration, all I/O pins (except dedicated inputs, clock, or configuration pins) are pulled high by a weak pull-up resistor. Together, the configuration and initialization processes are called command mode; normal device operation is called user mode. SRAM configuration elements allow ACEX 1K devices to be reconfigured in-circuit by loading new configuration data into the device. Real-time reconfiguration is performed by forcing the device into command mode with a device pin, loading different configuration data, re-initializing the device, and resuming user-mode operation. The entire reconfiguration process requires less than 40 ms and can be used to reconfigure an entire system dynamically. In-field upgrades can be performed by distributing new configuration files. Configuration Schemes The configuration data for an ACEX 1K device can be loaded with one of five configuration schemes (see Table 59), chosen on the basis of the target application. An EPC16, EPC2, EPC1, or EPC1441 configuration device, intelligent controller, or the JTAG port can be used to control the configuration of a ACEX 1K device, allowing automatic configuration on system power-up. Multiple ACEX 1K devices can be configured in any of the five configuration schemes by connecting the configuration enable (nCE) and configuration enable output (nCEO) pins on each device. Additional APEX 20K, APEX 20KE, FLEX 10K, FLEX 10KA, FLEX 10KE, ACEX 1K, and FLEX 6000 devices can be configured in the same serial chain. Device Pin- Outs See the Altera web site (http://www.altera.com) or the Altera Digital Library for pin-out information. Table 59. Data Sources for ACEX 1K Configuration Configuration Scheme Data Source Configuration device EPC16, EPC2, EPC1, or EPC1441 configuration device Passive serial (PS) BitBlaster or ByteBlasterMV download cables, or serial data source Passive parallel asynchronous (PPA) Parallel data source Passive parallel synchronous (PPS) Parallel data source JTAG BitBlaster or ByteBlasterMV download cables, or microprocessor with a Jam STAPL File or JBC File |
类似零件编号 - EP1K10 |
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类似说明 - EP1K10 |
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