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AD8332ARU-REEL7 数据表(PDF) 1 Page - Analog Devices

部件名 AD8332ARU-REEL7
功能描述  Ultralow Noise VGAs with Preamplifier and Programmable RIN
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8332ARU-REEL7 数据表(HTML) 1 Page - Analog Devices

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Ultralow Noise VGAs with
Preamplifier and Programmable RIN
AD8331/AD8332
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2003 Analog Devices, Inc. All rights reserved.
FEATURES
Ultralow noise preamplifier
Voltage noise = 0.74 nV/√Hz
Current noise = 2.5 pA/√Hz
3 dB bandwidth: 120 MHz
Low power: 125 mW/channel
Wide gain range with programmable postamp
–4.5 dB to +43.5 dB
+7.5 dB to +55.5 dB
Low output-referred noise: 48 nV/√Hz typical
Active input impedance matching
Optimized for 10-/12-bit ADCs
Selectable output clamping level
Single 5 V supply operation
Available in space-saving chip scale package
APPLICATIONS
Ultrasound and sonar time-gain control
High performance AGC systems
I/Q signal processing
High speed dual ADC driver
GENERAL DESCRIPTION
The AD8331/AD8332 are single- and dual-channel ultralow
noise, linear-in-dB, variable gain amplifiers. Although optimized
for ultrasound systems, they are usable as low noise variable
gain elements at frequencies up to 120 MHz.
Each channel consists of an ultralow noise preamplifier (LNA),
an X-AMP® VGA with 48 dB of gain range, and a selectable gain
postamplifier with adjustable output limiting. The LNA gain is
19 dB with a single-ended input and differential outputs capable
of accurate, programmable active input impedance matching by
selecting an external feedback resistor. Active impedance
control optimizes noise performance for applications that
benefit from input matching.
The 48 dB gain range of the VGA makes these devices suitable
for a variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear-in-dB scaling of 50 dB/V for control
voltages between 40 mV and 1 V. Factory trim ensures excellent
part-to-part and channel-to-channel gain matching. Differential
signal paths lead to superb second and third order distortion
performance and low crosstalk.
FUNCTIONAL BLOCK DIAGRAM
BIAS AND
INTERPOLATOR
VOL1
VPSV
VOH1
VMID
BIAS
(VMID)
COM1
LNA 1
VGA 1
+
[(–48 to 0) + 21] dB
+
LNA 2
VGA 2
POST
AMP1
POST
AMP2
ENB
VPS1 26
23
27
28
1
2
3
6
COM2
INH2
LMD2
INH1
LMD1
VPS2
VIN1
VIP1
LOP1
LON1
VIN2
VIP2
LOP2
LON2
GAIN
INT
VOL2
VOH2
GAIN
CLAMP
RCLMP
COMM
HILO
VCM2
VCM1
3.5dB/15.5dB
+19dB
25
24
22
21
15
20
9
19
4
5
7
8
14
18
11
17
16
10
13
12
Figure 1. AD8332 Shown 28-Lead TSSOP
FREQUENCY (Hz)
–10
0
10
20
40
30
50
100k
–20
1M
1G
100M
10M
VGAIN = 1V
0.8V
0.6V
0.4V
0.2V
0V
Figure 2. Frequency Response vs. Gain
The VGA’s low output-referred noise is advantageous in driving
high speed differential ADCs. The gain of the postamplifier may
be pin selected to 3.5 dB or 15.5 dB to optimize gain range and
output noise for 12-bit or 10-bit converter applications. The
output may be limited to a user-selected clamping level,
preventing input overload to a subsequent ADC. An external
resistor adjusts the clamping level.
The operating temperature range is –40°C to +85°. The
AD8331 is available in a 20-lead QSOP package, and the
AD8332 in 28-lead TSSOP and 32-lead LFCSP packages. They
require a single 5 V supply, and the quiescent power
consumption is 125 mW/ch. A power-down (enable) pin is
provided.


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