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TSEV8308500GLZA2 数据表(PDF) 8 Page - ATMEL Corporation |
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TSEV8308500GLZA2 数据表(HTML) 8 Page - ATMEL Corporation |
8 / 50 page 8 TS8308500 2193A–BDC–04/03 - Unterminated (source terminated) 75 Ω controlled impedance lines: 100 ps/pF or 150 ps per additionnal ECLinPS termina- tion load 10. Apply proper 50/75 Ω impedance traces propagation time derating values: 6 ps/mm (155 ps/inch) for TSEV8308500GL Eval- uation Board 11. Values for TOD and TDR track each other over temperature, (1% variation for TOD-TDR per 100 °C temperature variation). Therefore TOD-TDR variation over temperature is negligible. Moreover, the internal (on-chip) and package skews between each Data TODs and TDR effect can be considered negligible. Consequently, minimum values for TOD and TDR are never more than 100 ps apart. The same is true for the TOD and TDR maximum values (see Advanced Application Notes about “TOD-TDR Variation Over Temperature” on page 22). 12. Min value guarantees performance. Max value guarantees functionality 13. Min value guarantees functionality. Max value guarantees performance 14. Refer to product Application Notes |
类似零件编号 - TSEV8308500GLZA2 |
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类似说明 - TSEV8308500GLZA2 |
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