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932SQL456AKILF 数据表(PDF) 4 Page - Integrated Device Technology

部件名 932SQL456AKILF
功能描述  Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

932SQL456AKILF 数据表(HTML) 4 Page - Integrated Device Technology

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LOW-POWER CK420BQ DERIVATIVE FOR PCIE SEPARATE CLOCK ARCHITECTURES
4
REVISION B 09/29/15
932SQL456 DATASHEET
64VFQFPN Pin Descriptions
PIN #
PIN NAME
TYPE
DESCRIPTION
1
GNDPCI
PWR Ground pin for PCI outputs and logic.
2
VDDPCI
PWR 3.3V power for the PCI outputs and logic
3
PCI4_2x
OUT 3.3V PCI clock output
4
PCI3_2x
OUT 3.3V PCI clock output
5
PCI2_2x
OUT 3.3V PCI clock output
6
PCI1_2x
OUT 3.3V PCI clock output
7
PCI0_2x
OUT 3.3V PCI clock output
8
GNDPCI
PWR Ground pin for PCI outputs and logic.
9
VDDPCI
PWR 3.3V power for the PCI outputs and logic
10
VDD48
PWR 3.3V power for the 48MHz output and logic
11
48M_2x
OUT 3.3V 48MHz output
12
GND48
PWR Ground pin for 48MHz output and logic.
13
GND96
PWR Ground pin for DOT96 output and logic.
14
DOT96_Z85T
OUT
True clock of low-power push-pull differential 96MHz output. Internally terminated to drive 85ohm
transmission lines with no external components.
15
DOT96_Z85C
OUT
Complementary clock of low-power push-pull differential 96MHz output. Internally terminated to
drive 85ohm transmission lines with no external components.
16
AVDD96
PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic
17
TEST_MODE
IN
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test
mode. Refer to Test Clarification Table.
18
CKPWRGD#/PD
IN
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power
Up. PD is an asynchronous active high input pin used to put the device into a low power state.
The internal clocks and PLLs are stopped.
19
VDDSRC
PWR 3.3V power for the SRC outputs and logic
20
SRC0_Z85T
OUT
True clock of low-power push-pull differential SRC output. Internally terminated to drive 85ohm
transmission lines with no external components.
21
SRC0_Z85C
OUT
Complementary clock of low-power push-pull differential SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
22
GNDSRC
PWR Ground pin for SRC outputs and logic.
23
SRC1_Z85C
OUT
Complementary clock of low-power push-pull differential SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
24
SRC1_Z85T
OUT
True clock of low-power push-pull differential SRC output. Internally terminated to drive 85ohm
transmission lines with no external components.
25
SRC2_Z85C
OUT
Complementary clock of low-power push-pull differential SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
26
SRC2_Z85T
OUT
True clock of low-power push-pull differential SRC output. Internally terminated to drive 85ohm
transmission lines with no external components.
27
VDDSRC
PWR 3.3V power for the SRC outputs and logic
28
AVDD_SRC
PWR 3.3V power for the SRC PLL analog circuits
29
GNDSRC
PWR Ground pin for SRC outputs and logic.
30
NC
N/A
No Connection.
31
NS_SRC0_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SRC output. Internally
terminated to drive 85ohm transmission lines with no external components.
32
NS_SRC0_Z85T
OUT
True clock of low-power push-pull differential non-spreading SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
33
NS_SRC1_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SRC output. Internally
terminated to drive 85ohm transmission lines with no external components.
34
NS_SRC1_Z85T
OUT
True clock of low-power push-pull differential non-spreading SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
35
VDDNS
PWR 3.3V power for the Non-Spreading differential outputs outputs and logic
36
GNDNS
PWR Ground pin for non-spreading differential outputs and logic.
37
NS_SAS0_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SAS output. Internally
terminated to drive 85ohm transmission lines with no external components.
38
NS_SAS0_Z85T
OUT
True clock of low-power push-pull differential non-spreading SAS output. Internally terminated to
drive 85ohm transmission lines with no external components.


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