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AD10678BWS 数据表(PDF) 3 Page - Analog Devices |
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AD10678BWS 数据表(HTML) 3 Page - Analog Devices |
3 / 10 page AD10678 Rev. A | Page 3 of 20 AD10678–SPECIFICATIONS DC SPECIFICATIONS Table 1. AVCC = 5 V, EVCC = 3.3 V, VDD = 3.3 V; TA = 25°C, Differential Encode = 80 MSPS, CLOAD ≤ 10 pF, unless otherwise noted. Parameter Test Level Min Typ Max Unit RESOLUTION 16 Bits Offset Error I –0.30 +0.12 +0.30 %FS Gain Error I –7 +7 %FS Differential Nonlinearity (DNL) V ±0.7 LSB Integral Nonlinearity (INL) V ±4 LSB TEMPERATURE DRIFT Offset Error V 13 ppm/°C Gain Error V 200 ppm/°C POWER SUPPLY REJECTION RATIO (PSRR) V 60 dB ANALOG INPUTS (AIN, AIN)1 Differential Input Voltage Range V 2.15 V p-p Differential Input Resistance V 50 Ω Differential Input Capacitance V 2.5 nF Input Bandwidth IV 0.40 220 MHz VSWR 2 V 1.04:1 Ratio POWER SUPPLY 3 Supply Current IAVCC (AVCC = 5.0 V) I 0.95 1.1 A IEVCC (EVCC = 3.3 V) I 0.15 0.2 A IVDD (VDD = 3.3 V) I 0.49 0.625 A Total Power Dissipation 4 I 6.86 8.0 W 1 Measurement includes the recommended interface connector. 2 Input VSWR, see . Figure 15 3 Supply voltages should remain stable within ±5% for normal operation. 4 Power dissipation measures with encode at rated speed and –1 dBFS analog input at 10 MHz. DIGITAL SPECIFICATIONS Table 2. AVCC = 5 V, EVCC = 3.3 V, VDD = 3.3 V; TA = 25°C, Differential Encode = 80 MSPS, CLOAD ≤ 10 pF, unless otherwise noted. Parameter Test Level Min Typ Max Unit ENCODE INPUTS (ENCODE, ENCODE) Differential Input Voltage Range IV 0.4 V p-p Differential Input Resistance V 100 Ω Differential Input Capacitance V 160 pF LOGIC OUTPUTS (D15 to D0) Logic Compatibility CMOS Logic 1 Voltage—ILOAD ≤100 mA IV 0.9 × VDD V Logic 0 Voltage—ILOAD ≤100 mA IV 0.4 V Output Coding True Binary Series Output Resistance—per Bit 120 Ω |
类似零件编号 - AD10678BWS |
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类似说明 - AD10678BWS |
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