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AD5328 数据表(PDF) 1 Page - Analog Devices |
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AD5328 数据表(HTML) 1 Page - Analog Devices |
1 / 19 page REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. AD5308/AD5318/AD5328* 2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP *Protected by U.S.Patent No. 5,969,657; other patents pending. FEATURES AD5308: 8 Buffered 8-Bit DACs in 16-Lead TSSOP A Version: 1 LSB INL, B Version: 0.75 LSB INL AD5318: 8 Buffered 10-Bit DACs in 16-Lead TSSOP A Version: 4 LSB INL, B Version: 3 LSB INL AD5328: 8 Buffered 12-Bit DACs in 16-Lead TSSOP A Version: 16 LSB INL, B Version: 12 LSB INL Low Power Operation: 0.7 mA @ 3 V Guaranteed Monotonic by Design over All Codes Power-Down to 120 nA @ 3 V, 400 nA @ 5 V Double-Buffered Input Logic Buffered/Unbuffered/VDD Reference Input Options Output Range: 0 V to VREF or 0 V to 2 VREF Power-On Reset to 0 V Programmability Individual Channel Power-Down Simultaneous Update of Outputs ( LDAC) Low Power, SPI®, QSPI™, MICROWIRE™, and DSP Compatible 3-Wire Serial Interface On-Chip Rail-to-Rail Output Buffer Amplifiers Temperature Range –40 C to +105 C APPLICATIONS Portable Battery-Powered Instruments Digital Gain and Offset Adjustment Programmable Voltage and Current Sources Optical Networking Automatic Test Equipment FUNCTIONAL BLOCK DIAGRAM BUFFER INPUT REGISTER DAC REGISTER INTERFACE LOGIC DIN LDAC GND VOUTB VOUTC VOUTD VOUTE VOUTG VOUTH VOUTF VDD POWER-ON RESET GAIN-SELECT LOGIC VOUTA VREFEFGH VREFABCD SYNC SCLK POWER-DOWN LOGIC GAIN-SELECT LOGIC STRING DAC B BUFFER INPUT REGISTER DAC REGISTER STRING DAC C BUFFER INPUT REGISTER DAC REGISTER STRING DAC D BUFFER INPUT REGISTER DAC REGISTER STRING DAC E BUFFER INPUT REGISTER DAC REGISTER BUFFER INPUT REGISTER DAC REGISTER BUFFER INPUT REGISTER DAC REGISTER BUFFER INPUT REGISTER DAC REGISTER VDD VDD LDAC STRING DAC F STRING DAC G STRING DAC H STRING DAC A GENERAL DESCRIPTION The AD5308/AD5318/AD5328 are octal 8-, 10-, and 12-bit buffered voltage output DACs in a 16-lead TSSOP. They operate from a single 2.5 V to 5.5 V supply, consuming 0.7 mA typ at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/ µs. The AD5308/AD5318/ AD5328 use a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards. The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consump- tion of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually. All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board. Mobile Communications Programmable Attenuators Industrial Process Control |
类似零件编号 - AD5328 |
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类似说明 - AD5328 |
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