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DRV8320RHRHAT 数据表(PDF) 54 Page - Texas Instruments |
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DRV8320RHRHAT 数据表(HTML) 54 Page - Texas Instruments |
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54 / 89 page  54 DRV8320, DRV8320R DRV8323, DRV8323R SLVSDJ3A – FEBRUARY 2017 – REVISED APRIL 2017 www.ti.com Product Folder Links: DRV8320 DRV8320R DRV8323 DRV8323R Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8.6.2 Control Registers The control registers are used to configure the device. The control registers are read and write capable Complex bit access types are encoded to fit into small table cells. Table 15 shows the codes that are used for access types in this section. Table 15. Control Registers Access Type Codes Access Type Code Description Read Type R R Read Write Type W W Write Reset or Default Value -n Value after reset or the default value 8.6.2.1 Driver Control Register (address = 0x02h) The driver control register is shown in Figure 46 and described in Table 16. Register access type: Read/Write Figure 46. Driver Control Register 10 9 8 7 6 5 4 3 2 1 0 Reserved DIS _CPUV DIS _GDF OTW _REP PWM_MODE 1PWM _COM 1PWM _DIR COAST BRAKE CLR _FLT R/W-0b R/W-0b R/W-0b R/W-0b R/W-00b R/W-0b R/W-0b R/W-0b R/W-0b R/W-0b Table 16. Driver Control Field Descriptions Bit Field Type Default Description 10 Reserved R/W 0b Reserved 9 DIS_CPUV R/W 0b 0b = Charge-pump undervoltage lockout fault is enabled 1b = Charge-pump undervoltage lockout fault is disabled 8 DIS_GDF R/W 0b 0b = Gate drive fault is enabled 1b = Gate drive fault is disabled 7 OTW_REP R/W 0b 0b = OTW is not reported on nFAULT or the FAULT bit 1b = OTW is reported on nFAULT and the FAULT bit 6-5 PWM_MODE R/W 00b 00b = 6x PWM Mode 01b = 3x PWM mode 10b = 1x PWM mode 11b = Independent PWM mode 4 1PWM_COM R/W 0b 0b = 1x PWM mode uses synchronous rectification 1b = 1x PWM mode uses asynchronous rectification (diode freewheeling) 3 1PWM_DIR R/W 0b In 1x PWM mode this bit is ORed with the INHC (DIR) input 2 COAST R/W 0b Write a 1 to this bit to put all MOSFETs in the Hi-Z state 1 BRAKE R/W 0b Write a 1 to this bit to turn on all three low-side MOSFETs in 1x PWM mode. This bit is ORed with the INLC (BRAKE) input. 0 CLR_FLT R/W 0b Write a 1 to this bit to clear latched fault bits. This bit automatically resets after being writen. |
类似零件编号 - DRV8320RHRHAT |
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类似说明 - DRV8320RHRHAT |
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