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STK14CA8-N25I 数据表(PDF) 6 Page - List of Unclassifed Manufacturers |
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STK14CA8-N25I 数据表(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 15 page STK14CA8 December 2004 Document Control #ML0022 rev 1.0 6 SRAM WRITE CYCLES #1 & #2 Notes g: If W is low when E goes low, the outputs remain in the high-impedance state. h: E or W must be ≥ VIH during address transitions. SRAM WRITE CYCLE #1: W Controlledh,f SRAM WRITE CYCLE #2: E Controlledh,f SYMBOLS STK14CA8-25 STK14CA8-35 STK14CA8-45 UNITS NO. #1 #2 Alt. PARAMETER MIN MAX MIN MAX MIN MAX 12 tAVAV tAVAV tWC Write Cycle Time 25 35 45 ns 13 tWLWH tWLEH tWP Write Pulse Width 20 25 30 ns 14 tELWH tELEH tCW Chip Enable to End of Write 20 25 30 ns 15 tDVWH tDVEH tDW Data Set-up to End of Write 10 12 15 ns 16 tWHDX tEHDX tDH Data Hold after End of Write 0 0 0 ns 17 tAVWH tAVEH tAW Address Set-up to End of Write 20 25 30 ns 18 tAVWL tAVEL tAS Address Set-up to Start of Write 0 0 0 ns 19 tWHAX tEHAX tWR Address Hold after End of Write 0 0 0 ns 20 tWLQZe,g tWZ Write Enable to Output Disable 10 13 15 ns 21 tWHQX tOW Output Active after End of Write 3 3 3 ns ADDRESS DATA OUT DATA IN W E ADDRESS HIGH IMPEDANCE DATA VALID PREVIOUS DATA 14 tELWH 19 tWHAX 17 tAVWH 18 tAVWL 13 tWLWH 15 tDVWH 16 tWHDX 20 tWLQZ 21 tWHQX 12 tAVAV DATA OUT DATA IN W E HIGH IMPEDANCE DATA VALID 12 tAVAV 14 tELEH 18 tAVEL 19 tEHAX 17 tAVEH 13 tWLEH 15 tDVEH 16 tEHDX |
类似零件编号 - STK14CA8-N25I |
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类似说明 - STK14CA8-N25I |
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