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MC33790 数据表(PDF) 6 Page - Motorola, Inc

部件名 MC33790
功能描述  Two-Channel Distributed System Interface (DSI) Physical Interface Device
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MC33790 数据表(HTML) 6 Page - Motorola, Inc

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33790
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
6
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 4.75 V
≤ VDD ≤ 5.25 V, 8.0 V ≤ VSUP ≤ 25.0 V, -40°C ≤ TJ ≤ 150°C unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
MICROCONTROLLER INTERFACE
Microcontroller Signal Cycle Time
tcyc
6.6
1000
µs
Microcontroller Signal Low Time
tcycL
2.0
667
µs
Microcontroller Signal High Time
tcycH
2.0
667
µs
Microcontroller Signal Duty Cycle for Logic Zero
DCLo
30
33
36
%
Microcontroller Signal Duty Cycle for Logic One
DCHi
60.0
66.7
72.0
%
Microcontroller Signal Slew Time (Note 5)
tslew
500
ns
Frame Start to Signal Delay Time
tDLY1
tcyc-0.1
tcyc
tcyc+0.1
µs
Signal End to Frame End Delay Time
tDLY2
1.0
µs
Rise Time (Note 5)
tRISE
0
100
ns
Fall Time (Note 5)
tFALL
0
100
ns
BUS TRANSMITTER
Idle to Frame and Frame to Idle Slew Rate
C
≤ 5.0 nF
tslew(FRAME)
3.0
6.0
10.0
V/
µs
Signal High to Low and Signal Low to High Slew Rate
C
≤ 5.0 nF
tslew(SIGNAL)
3.0
4.5
8.0
V/
µs
Data Valid (VSUPx = 25 V, CL ≤ 5.0 nF)
DSIxF, VIN(TH) to DSIxO = 5.3 V
DSIxS, VIN(TH) to DSIxO = 2.6 V
DSIxS, VIN(TH) to DSIxO = 3.4 V
DSIxF, VIN(TH) to DSIxO = 7.0 V
tDVLD1
tDVLD2
tDVLD3
tDVLD4
2.44
0.25
0.25
0.25
6.56
1.3
1.3
1.3
µs
BUS RECEIVER
Receiver Delay Time
I = 9.0 mA to DSIxR = 0.8*VDD
I = -1.0 mA to DSIxR = 0.2*VDD
tDRH
tDRL
400
400
750
750
ns
Notes
5.
Slew times and rise and fall times between 10% and 90% of output high and low levels.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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