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HS-82C37 数据表(PDF) 17 Page - Harris Corporation

部件名 HS-82C37
功能描述  Radiation Hardened CMOS High Performance Programmable DMA Controller
Download  28 Pages
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制造商  HARRIS [Harris Corporation]
网页  http://www.harris.com
标志 HARRIS - Harris Corporation

HS-82C37 数据表(HTML) 17 Page - Harris Corporation

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17
HS-82C37ARH
HS-82C37ARH 42 LEAD CERAMIC FLATPACK
HS-82C37ARH 42 LEAD CERAMIC FLATPACK
STATIC CONFIGURATION
NOTES:
1. VDD = +6.0V
± 5%
Part is Static Sensitive
2. TA = +125
oC Minimum
Voltage Must be Ramped
3. Resistors:
R1 = 10k
Ω± 10% (Pins 6, 7, 11-13, 16-19)
R2 = 2.7k
Ω± 5% (Pins 1, 2, 21-23, 26-30, 32-36)
START-UP TIMING
NOTES:
1. F0 is 50% duty cycle square wave pulse burst.
2. 1.0kHz
≤ F0 ≤ 100kHz
F0 is left High after pulse burst
3. 10 cycles
≤ F0 Pulse Burst ≤ 1.0s
4. F1 = Single pulse with width equal to 2 cycles of F0
5. F1 is left Low after pulse burst
6. F1 pulse occurs after start of F0 and ends before F0.
Input levels: 0.9VDD
≤ VIH ≤ VDD, -0.3V ≤ VIL ≤ 0.7V
DYNAMIC CONFIGURATION
NOTES:
1. VDD = 6.5V
± 5% (Burn-In)
2. VDD = 6.0V
± 5% (Life Test)
3. TA = +125
oC Minimum
4. Part is Static Sensitive, Voltage Must be Ramped
5. Resistors:
R1 = 10k
Ω± 10% (Pins 6, 7, 11-13, 16-19)
R2 = 2.7k
Ω± 10% (Pins 1, 2, 21-23, 26-30, 32-36, and LOADS)
Burn-In Circuits (Continued)
VDD
1
2
3
4
5
6
7
8
9
21
13
10
11
12
14
15
16
17
18
19
20
37
38
39
40
41
42
35
34
33
32
31
28
29
30
36
26
23
24
25
22
27
F0
F1
LOAD
2.7K
2.7K
VDD
1
2
3
4
5
6
7
8
9
21
13
10
11
12
14
15
16
17
18
19
20
37
38
39
40
41
42
35
34
33
32
31
28
29
30
36
26
23
24
25
22
27
F0
LOAD
F0
F5
F1
F2
F3
F4
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
OPEN
OPEN
OPEN
VDD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
F5
F4
F3
F2
F1
F0
F0
F1
Spec Number
518058


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