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STC62WV1024JIP70 数据表(PDF) 2 Page - List of Unclassifed Manufacturers

部件名 STC62WV1024JIP70
功能描述  VERY LOW POWER VOLTAGE CMOS SRAM
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

STC62WV1024JIP70 数据表(HTML) 2 Page - List of Unclassifed Manufacturers

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STC62WV1024
Revision 2.1
Jan.
2004
2
STC
STC62WV1024
SYMBOL
PARAMETER
CONDITIONS
MAX.
UNIT
CIN
Input
Capacitance
VIN=0V
6
pF
CDQ
Input/Output
Capacitance
VI/O=0V
8
pF
ABSOLUTE MAXIMUM RATINGS(1)
OPERATING RANGE
CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz)
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
1. This parameter is guaranteed and not 100% tested.
SYMBOL
PARAMETER
RATING
UNITS
V TERM
Terminal Voltage with
Respect to GND
-0.5 to
Vcc+0.5
V
T BIAS
Temperature Under Bias
-40 to +85
O C
T STG
Storage Temperature
-60 to +150
O C
P T
Power Dissipation
1.0
W
I OUT
DC Output Current
20
mA
RANGE
AMBIENT
TEMPERATURE
Vcc
Commercial
0 O C to +70 O C2.4V ~ 5.5V
Industrial
-40 O C to +85 O C2.4V ~ 5.5V
TRUTH TABLE
PIN DESCRIPTIONS
Name
Function
A0-A16 Address Input
These 17 address inputs select one of the 131,072 x 8-bit words in the RAM
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when
data read from or write to the device. If either chip enable is not active, the device is
deselected and is in a standby power mode. The DQ pins will be in the high
impedance state when the device is deselected.
WE Write Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
DQ0-DQ7 Data Input/Output
Ports
These 8 bi-directional ports are used to read data from or write data into the RAM.
Vcc
Power Supply
Gnd
Ground
MODE
WE
CE1
CE2
OE
I/O OPERATION
Vcc CURRENT
XH
X
X
Not selected
(Power Down)
XX
L
X
High Z
ICCSB, ICCSB1
Output Disabled
H
L
H
H
High Z
ICC
Read
H
L
H
L
DOUT
ICC
Write
L
L
H
X
DIN
ICC


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