数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD9528BCPZ-REEL7 数据表(PDF) 6 Page - Analog Devices

部件名 AD9528BCPZ-REEL7
功能描述  Maximum output frequency
Download  68 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9528BCPZ-REEL7 数据表(HTML) 6 Page - Analog Devices

Back Button AD9528BCPZ-REEL7 Datasheet HTML 2Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 3Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 4Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 5Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 6Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 7Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 8Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 9Page - Analog Devices AD9528BCPZ-REEL7 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 68 page
background image
Data Sheet
AD9528
Rev. C | Page 5 of 67
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY CURRENT FOR
EACH CLOCK
DISTRIBUTION
CHANNEL
Each clock output channel has a dedicated VDD pin. The current draw for each
VDD pin includes the divider, fine delay, and output driver, fine delay is off; see the
Pin Configuration and Function Descriptions section for pin assignment
LVDS Mode, 3.5 mA
21
23
mA
Output = 122.88 MHz, channel divider = 10
24
26
mA
Output = 409.6 MHz, channel divider = 3
28
30
mA
Output = 737.28 MHz, channel divider = 1, VCO divider = 5, LVDS boost mode of
4.5 mA recommended
LVDS Boost Mode,
4.5 mA
22
24
mA
Output = 122.88 MHz, channel divider =10
25
27
mA
Output = 409.6 MHz, channel divider = 3
29
31
mA
Output = 737.28 MHz, channel divider = 1, VCO divider = 5
HSTL Mode, 9 mA
25
27
mA
Output = 122.88 MHz, channel divider =10
26
28
mA
Output = 409.6 MHz, channel divider = 3
29
31
mA
Output = 983.04 MHz, channel divider = 1, VCO divider = 5, VCO = 3932.16 MHz
37
41
mA
Output = 1228.8 MHz, channel divider = 1, only output channels OUT1 and OUT2
support output frequencies greater than ~1 GHz
Chip Power-Down
Mode
2.5
4
mA
For each channel VDD pin, chip power-down bit enabled (Register 0x0500, Bit 0 = 1)
POWER DISSIPATION
Table 3.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
TOTAL POWER
DISSIPATION
Does not include power dissipated in termination resistors
Typical Dual Loop
Mode Configuration
1675
1780
mW
Differential REFA input at 122.88 MHz; f
VCXO = 122.88 MHz, fVCO = 3686.4 MHz, VCO
divider at 3 clock distribution outputs running as follows: 7 HSTL at 122.88 MHz,
7 LVDS (3.5 mA) at 960 kHz
Typical Single Loop
Mode
Configuration
1635
1810
mW
PLL1 off, differential VCXO input at 122.88 MHz, clock distribution outputs running
as follows: 7 HSTL at 122.88 MHz, 7 LVDS (3.5 mA) at 960 kHz
Typical Buffer Mode
1030
1200
mW
PLL1 and PLL2 off, differential VCXO input at 122.88 MHz. SYSREF generator off,
differential SYSREF input at 960 kHz; clock distribution outputs running as follows:
7 HSTL at 122.88 MHz, 7 LVDS (3.5 mA) at 960 kHz
Chip Power-Down
Mode
65
mW
Chip power-down bit enabled (Register 0x0500, Bit 0 = 1)
RESET Enabled
1015
1200
mW
RESET pin low
INCREMENTAL POWER
DISSIPATION
Does not include power dissipated in termination resistors
Low Power Base
Configuration
590
mW
Dual loop mode, SYSREF generation and fine delay off; total power with 1 LVDS
output running at 122.88 MHz, single-ended REFA at 122.88 MHz; REFB off,
VCXO = 122.88 MHz, VCO = 3686.4 MHz
PLL1 OFF
0
mW
Define settings to power off PLL1
Output Distribution
Incremental power increase for each additional enable output
LVDS Mode, 3.5 mA
70
mW
Single 3.5 mA LVDS output at 122.88 MHz, channel divider = 10
78
mW
Single 3.5 mA LVDS output at 409.6 MHz, channel divider = 3
92
mW
Single 3.5 mA LVDS output at 737.28 MHz, VCO divider = 5, channel divider = 1
LVDS Mode, 4.5 mA
73
mW
Single 4.5 mA LVDS output at 122.88 MHz, channel divider = 10
81
mW
Single 4.5 mA LVDS output at 409.6 MHz, channel divider = 3
95
mW
Single 4.5 mA LVDS output at 737.28 MHz, VCO divider = 5


类似零件编号 - AD9528BCPZ-REEL7

制造商部件名数据表功能描述
logo
Analog Devices
AD9528BCPZ-REEL7 AD-AD9528BCPZ-REEL7 Datasheet
1Mb / 67P
   JESD204B Clock Generator with 14 LVDS/HSTL Outputs
More results

类似说明 - AD9528BCPZ-REEL7

制造商部件名数据表功能描述
logo
Integrated Device Techn...
ICS853S12I IDT-ICS853S12I Datasheet
336Kb / 17P
   Maximum output frequency
83056 IDT-83056 Datasheet
167Kb / 15P
   Maximum output frequency
83947 IDT-83947 Datasheet
122Kb / 10P
   Maximum output frequency
ICS853S54I IDT-ICS853S54I Datasheet
478Kb / 21P
   Maximum output frequency
83054 IDT-83054 Datasheet
170Kb / 14P
   Maximum output frequency
ICS8530-01 IDT-ICS8530-01 Datasheet
149Kb / 17P
   Maximum output frequency
ICS859S0412I IDT-ICS859S0412I Datasheet
679Kb / 23P
   Maximum output frequency
ICS853S012I IDT-ICS853S012I Datasheet
476Kb / 22P
   Maximum output frequency
83918 IDT-83918 Datasheet
266Kb / 19P
   Maximum output frequency
83940D IDT-83940D Datasheet
220Kb / 16P
   Maximum output frequency
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com