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CD74HC540 Datasheet(数据表) 6 Page - Texas Instruments

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部件型号  CD74HC540
说明  High Speed CMOS Logic Octal Buffer and Line Drivers, Three-State
下载  8 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
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CD74HC540 Datasheet(HTML) 6 Page - Texas Instruments

   
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6
Three-State Output
Capacitance
CO
-
-
20
-
20
-
20
-
20
pF
Power Dissipation Capacitance
(Notes 4, 5) (540, 541)
CPD
CL = 15pF
5
-
55
-
-
-
-
-
pF
NOTES:
4. CPD is used to determine the dynamic power consumption, per channel.
5. PD = VCC
2 f
i (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Switching Specifications CL = 50pF, Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO
85oC
-55oC TO
125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Test Circuits and Waveforms
FIGURE 1. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 3. HC THREE-STATE PROPAGATION DELAY
WAVEFORM
FIGURE 4. HCT THREE-STATE PROPAGATION DELAY
WAVEFORM
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
tPHL
tPLH
tTHL
tTLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
tr = 6ns
tf = 6ns
90%
50%
10%
90%
GND
VCC
10%
90%
50%
50%
OUTPUT
DISABLE
OUTPUT LOW
TO OFF
OUTPUT HIGH
TO OFF
OUTPUTS
ENABLED
OUTPUTS
DISABLED
OUTPUTS
ENABLED
6ns
6ns
tPZH
tPHZ
tPZL
tPLZ
0.3
2.7
GND
3V
10%
90%
1.3V
1.3V
OUTPUT
DISABLE
OUTPUT LOW
TO OFF
OUTPUT HIGH
TO OFF
OUTPUTS
ENABLED
OUTPUTS
DISABLED
OUTPUTS
ENABLED
tr
6ns
tPZH
tPHZ
tPZL
tPLZ
6ns
tf
1.3
CD74HC540, CD74HCT540, CD74HC541, CD74HCT541




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