ISL29034

8

FN8370.2

August 19, 2016

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Read Operation

The ISL29034 has two basic read operations: Byte read and

Burst read.

BYTE READ

Byte read operations allow the master to access any register

location in the ISL29034. The Byte read operation is a two step

process. The master issues the START condition, and the Device

Address byte with the R/W bit set to “0”, receives an

acknowledge, then issues the Register Address byte. After

acknowledging receipt of the Register Address byte, the master

immediately issues another START condition and the Device

Address byte with the R/W bit set to “1”. This is followed by an

acknowledge from the device and then by the 8-bit data word.

The master terminates the read operation by not responding with

an acknowledge and then issuing a stop condition

(refer to Figure 13).

BURST READ

Burst read operation is identical to the Byte read operation. After

the first Data byte is transmitted, the master now responds with

an acknowledge, indicating it requires additional data. The

device continues to output data for each acknowledge received.

The master terminates the read operation by not responding with

an acknowledge but issuing a STOP condition (refer to Figure 14).

Power-On Reset

The Power-On Reset (POR) circuitry protects the internal logic

against powering up in the incorrect state. The ISL29034 will

below the POR trigger level. This bidirectional POR feature

protects the device against ‘brown-out’ failure following a

temporary loss of power.

The POR is an important feature because it prevents the

ISL29034 from starting to operate with insufficient voltage, prior

to stabilization of the internal bandgap. The ISL29034 prevents

communication to its registers and greatly reduces the likelihood

of data corruption on power-up.

FIGURE 11. BYTE WRITE SEQUENCE

1 0 0 01 00 0

A

C

K

A

C

K

A

C

K

S

T

O

P

S

T

A

R

T

DEVICE ADDRESS

BYTE

ADDRESS BYTE

DATA BYTE

SIGNAL FROM

MASTER DEVICE

SIGNAL AT SDA

SIGNALS FROM

SLAVE DEVICE

FIGURE 12. START, DATA STABLE, ACKNOWLEDGE AND STOP CONDITION

SDA FROM

RECEIVER

SDA FROM

TRANSMITTER

SCL FROM

MASTER

START

DATA

CHANGE

DATA

STABLE

DATA

STABLE

ACK

STOP

HIGH

IMPEDANCE