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74HC2G00DC 数据表(PDF) 10 Page - NXP Semiconductors |
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74HC2G00DC 数据表(HTML) 10 Page - NXP Semiconductors |
10 / 16 page 2003 Feb 12 10 Philips Semiconductors Product specification Dual 2-input NAND gate 74HC2G00; 74HCT2G00 AC WAVEFORMS handbook, halfpage MNA714 tPLH tPHL VM VM 90% 10% VM VM nY output nA, nB input VI GND VOH VOL tTLH tTHL Fig.5 The input (nA, nB) to output (nY) propagation delays and transition times. For 74HC2G00: VM = 50%; VI = GND to VCC. For 74HCT2G00: VM = 1.3 V; VI = GND to 3.0 V. handbook, full pagewidth open GND 50 pF VCC VCC VI VO MNA742 D.U.T. CL RT RL 1 k Ω PULSE GENERATOR S1 Fig.6 Load circuitry for switching times. Definitions for test circuit: CL = load capacitance including jig and probe capacitance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. TEST S1 tPLH/tPHL open tPLZ/tPZL Vcc tPHZ/tPZH GND |
类似零件编号 - 74HC2G00DC |
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类似说明 - 74HC2G00DC |
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