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SN74LSXXN 数据表(PDF) 4 Page - Motorola, Inc |
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SN74LSXXN 数据表(HTML) 4 Page - Motorola, Inc |
4 / 4 page 5-4 FAST AND LS TTL DATA SN54/74LS75 D SN54/74LS77 LOGIC DIAGRAM DATA ENABLE TO OTHER LATCH Q (SN54/74LS75 ONLY) Q GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 –55 0 25 25 125 70 °C IOH Output Current — High 54, 74 – 0.4 mA IOL Output Current — Low 54 74 4.0 8.0 mA AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V) Sb l P Limits Ui T C di i Symbol Parameter Min Typ Max Unit Test Conditions tW Enable Pulse Width High 20 ns V5 0 V ts Setup Time 20 ns VCC = 5.0 V th Hold Time 0 ns AC WAVEFORMS D E Q Q 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V th ts tPLH tPLH tPHL tPHL tPLH tPHL tPHL tPLH DEFINITION OF TERMS SETUP TIME (ts) — is defined as the minimum time required for the correct logic level to be present at the logic input prior to the clock transition from HIGH-to-LOW in order to be recognized and transferred to the outputs. HOLD TIME (th) — is defined as the minimum time following the clock transition from HIGH-to-LOW that the logic level must be maintained at the input in order to ensure continued recognition. A negative HOLD TIME indicates that the correct logic level may be released prior to the clock transition from HIGH-to-LOW and still be recognized. |
类似零件编号 - SN74LSXXN |
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类似说明 - SN74LSXXN |
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