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MC74ACT373DWR2G 数据表(PDF) 1 Page - ON Semiconductor |
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MC74ACT373DWR2G 数据表(HTML) 1 Page - ON Semiconductor |
1 / 10 page © Semiconductor Components Industries, LLC, 2015 February, 2015 − Rev. 9 1 Publication Order Number: MC74AC373/D MC74AC373, MC74ACT373 Octal Transparent Latch with 3-State Outputs The MC74AC373/74ACT373 consists of eight latches with 3−state outputs for bus organized system applications. The flip−flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. Features • Eight Latches in a Single Package • 3−State Outputs for Bus Interfacing • Outputs Source/Sink 24 mA • ′ACT373 Has TTL Compatible Inputs • These are Pb−Free Devices Figure 1. Pinout: 20−Lead Packages Conductors (Top View) 19 20 18 17 16 15 14 2 1 3 4 567 VCC 13 8 12 9 11 10 O7 D7 D6 O6 O5 D5 D4 O4 LE OE O0 D0 D1 O1 O2 D2 D3 O3 GND PIN ASSIGNMENT PIN FUNCTION D0−D7 Data Inputs LE Latch Enable Input OE Output Enable Input O0−O7 3−State Latch Outputs Figure 2. Logic Symbol O0 O1 O2 O3 O4 O5 O6 O7 D0 D1 D2 D3 D4 D5 D6 D7 LE OE www.onsemi.com SOIC−20W DW SUFFIX CASE 751D TSSOP−20 DT SUFFIX CASE 948E 1 1 See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ORDERING INFORMATION See general marking information in the device marking section on page 9 of this data sheet. DEVICE MARKING INFORMATION |
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