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ISL58781 数据表(PDF) 8 Page - Intersil Corporation |
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ISL58781 数据表(HTML) 8 Page - Intersil Corporation |
8 / 15 page 8 FN6909.3 December 3, 2015 Submit Document Feedback SS-WIDTH-RANGE Spread Spectrum Spreading Width Adjustment Range RFREQ = 4.7kReg 1-18 = 10h, Reg 0-16 = 26h; Reg X-00 bit 6 = 0 0.1 0.525 1.1 % SS_Shift Shift of Center Frequency when SS is Enabled vs when it’s Disabled RFREQ = 4.7kReg 1-18-00h to 30h, Reg 0-16 = 26h; Reg X-00 bit 6 = 0 0.7 % SS_Mod Spread Spectrum Modulation Frequency REG 1-18h Bit 7 = 0; Reg X-00 bit 6 = 0 30 53 80 kHz SS_Mod Spread Spectrum Modulation Frequency REG 1-18h Bit 7 = 1; Reg X-00 bit 6 = 0 15 34 55 kHz HFM (High Frequency Modulator) Standard conditions unless otherwise noted. (Continued) PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT Serial Interface AC Performance Standard conditions unless otherwise noted. PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT FSER SCLK Operating Range Static logic not limited at low frequency 50 MHz tEH SEN “H” Time @ 50MHz 320 ns tEL SEN “L” Time @ 50MHz 160 ns tERSR SEN Rising Edge to the First SCLK Rising Edge @ 50MHz 10 ns tCDS SDIO Set Up Time @ 50MHz 10 ns tCDH SDIO Hold Time @ 50MHz 10 ns tSREF Last SCLK Rising Edge to SEN Falling Edge @ 50MHz 10 ns tCC SCLK Cycle Time1 @ 50MHz 20 ns Duty SCLK “H” Duty Cycle @ 50MHz 40 50 60 % tCDD SDIO Output Delay @ 50MHz 4 ns tEDH SDIO Output Hold Time @ 50MHz 2 ns LVDS Specifications Standard conditions unless otherwise noted. PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT VIN-HIGH Maximum Single Line Voltage 2.4 V VIN-LOW Minimum Single Line Voltage 0V CIN Input Capacitance 2pF RIN Input Resistance 85 100 115 VMIN Minimum Differential Voltage Signal tested with ±240mV differential input 240 mVPK ISL58781 |
类似零件编号 - ISL58781 |
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类似说明 - ISL58781 |
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