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DM9161 数据表(PDF) 3 Page - List of Unclassifed Manufacturers |
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DM9161 数据表(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 47 page DM9161 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver Final 3 Version: DM9161-DS-F02 May 10,2002 9.4.10 MII 10Base-T Nibble Transmit Timing Parameters ..................................................36 9.4.11 MII 10Base-T Nibble Transmit Timing Diagram........................................................36 9.4.12 MII 10Base-T Receive Nibble Timing Parameters .................................................. 37 9.4.13 MII 10Base-T Receive Nibble Timing Diagram........................................................37 9.4.14 Auto-negotiation and Fast Link Pulse Timing Parameters ..................................................37 9.4.15 Auto-negotiation and Fast Link Pulse Timing Diagram .......................................................38 9.4.16 RMII Receive Timing Diagram .....................38 9.4.17 RMII Transmit Timing Diagram....................38 9.4.18 RMII Timing Diagram ...................................39 9.4.19 RMII Timing Parameter................................39 10. Application Notes ..............................................40 10.1 Network Interface Signal Routing....................40 10.2 10Base-T/100Base-TX Application.................40 10.3 10Base-T (Power Reduction Application) .......41 10.4 Power Decoupling Capacitors.........................42 10.5 Ground Plane Layout ......................................43 10.6 Power Plane Partitioning.................................44 10.7 Magnetics Selection Guide .............................45 10.8 Crystal Selection Guide...................................45 11. Package Information .........................................46 12.Order Information...............................................47 |
类似零件编号 - DM9161 |
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类似说明 - DM9161 |
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