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ADP7159 Datasheet(数据表) 1 Page - Analog Devices

部件型号  ADP7159
说明  High PSRR, RF Linear Regulator
下载  23 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
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1.2 A, Ultralow Noise,
High PSRR, RF Linear Regulator
Data Sheet
ADP7156
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
Input voltage range: 2.3 V to 5.5 V
16 standard voltages between 1.2 V and 3.3 V available
Maximum load current: 1.2 A
Low noise
0.9 μV rms total integrated noise from 100 Hz to 100 kHz
1.6 μV rms total integrated noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR)
80 dB from 1 kHz to 100 kHz; 60 dB at 1 MHz, VOUT = 3.3 V,
VIN = 4.0 V
Dropout voltage: 120 mV typical at IOUT = 1.2 A, VOUT = 3.3 V
Initial accuracy: ±0.6% at ILOAD = 10 mA
Initial accuracy over line, load, and temperature: ±1.5%
Quiescent current: IGND = 4.0 mA at no load, 7 mA at 1.2 A
Low shutdown current: 0.2 μA
Stable with a 10 μF ceramic output capacitor
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages
Precision enable
Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications: phase-locked
loops (PLLs), voltage controlled oscillators (VCOs), and
PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links
GENERAL DESCRIPTION
The ADP7156 is a linear regulator that operates from 2.3 V to 5.5 V
and provides up to 1.2 A of output current. Using an advanced
proprietary architecture, it provides high power supply rejection
and ultralow noise, achieving excellent line and load transient
response with only a 10 μF ceramic output capacitor.
There are 16 standard output voltages for the ADP7156. The
following voltages are available from stock: 1.2 V, 1.8 V, 2.0 V,
2.5 V, 2.8 V, 3.0 V and 3.3 V. Additional voltages available by
special order are 1.3 V, 1.5 V, 1.6 V, 2.2 V, 2.6 V, 2.7 V, 2.9 V,
3.1 V, and 3.2 V.
The ADP7156 regulator typical output noise is 0.9 μV rms
from 100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral
density from 10 kHz to 1 MHz. The ADP7156 is available in a
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages,
making it not only a very compact solution, but also providing
excellent thermal performance for applications requiring up to
1.2 A of output current in a small, low profile footprint.
TYPICAL APPLICATION CIRCUIT
GND (EPAD)
EN
REF
VIN
VOUT
ADP7156
ON
OFF
VIN = 3.8V
VOUT = 3.3V
VOUT_SENSE
CIN
10µF
COUT
10µF
BYP
VREG
CBYP
1µF
CREG
1µF
REF_SENSE
CREF
1µF
Figure 1.
Table 1. Related Devices
Model
Input
Voltage
Output
Current
Fixed/
Adj1
Package
ADP7158,
ADP7159
2.3 V to 5.5 V
2 A
Fixed/
Adj
10-lead LFCSP/
8-lead SOIC
ADP7157
2.3 V to 5.5 V
1.2 A
Fixed/
Adj
10-lead LFCSP/
8-lead SOIC
ADM7150,
ADM7151
4.5 V to 16 V
800 mA
Fixed/
Adj
8-lead LFCSP/
8-lead SOIC
ADM7154,
ADM7155
2.3 V to 5.5 V
600 mA
Fixed/
Adj
8-lead LFCSP/
8-lead SOIC
ADM7160
2.2 V to 5.5 V
200 mA
Fixed
6-lead LFCSP/
5-lead TSOT
1 Adj means adjustable.
0.1
1
10
100
1k
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
CBYP =1µF
CBYP =10µF
CBYP =100µF
CBYP =1000µF
Figure 2. Noise Spectral Density at Different Values of CBYP, VOUT = 3.3 V




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