MC100EPT24DTG datasheet(2/8 Pages) ONSEMI

部件名	MC100EPT24DTG

功能描述	LVTTL/LVCMOS to Differential LVECL Translator

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制造商	ONSEMI [ON Semiconductor]

网页	http://www.onsemi.com

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MC100EPT24

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2

1

2

3

45

6

7

8

Q

GND

VCC

Figure 1. 8-Lead Pinout (Top View) and Logic Diagram

D

Q

NC

VEE

LVTTL

LVECL

Table 1. PIN DESCRIPTION

Q, Q

D

LVTTL Input

FUNCTION

Differential LVECL Outputs

VCC

GND

Ground

Positive Supply

VEE

Negative Supply

NC

No Connect

EP

(DFN8 only) Thermal exposed pad

must be connected to a sufficient ther-

mal conduit. Electrically connect to the

most negative supply (GND) or leave

unconnected, floating open.

Table 2. ATTRIBUTES

Characteristics

Value

Internal Input Pulldown Resistor

N/A

Internal Input Pullup Resistor

N/A

ESD Protection

Human Body Model

Machine Model

Charged Device Model

> 4 kV

> 200 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

Pb-Free Pkg

SOIC−8 NB

TSSOP−8

DFN8

Level 1

Level 3

Level 1

Flammability Rating

Oxygen Index: 28 to 34

UL 94 V−0 @ 0.125 in

Transistor Count

181 Devices

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

类似零件编号 - MC100EPT24DTG

制造商	部件名	数据表	功能描述
ON Semiconductor	MC100EPT24DTG	135Kb / 8P	3.3V LVTTL/LVCMOS to Differential LVECL Translator December, 2006 ??Rev. 8

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类似说明 - MC100EPT24DTG

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