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ST72F561K9 数据表(PDF) 11 Page - STMicroelectronics |
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ST72F561K9 数据表(HTML) 11 Page - STMicroelectronics |
11 / 262 page ST72561 11/262 Notes: 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. 2. Input mode can be used for general purpose I/O, output mode only for CANTX. 3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil- lator; see Section 1 and Section 12.5 "CLOCK AND TIMING CHARACTERISTICS" for more details. 4. On the chip, each I/O port has 8 pads. Pads that are not bonded to external pins are in input pull-up con- figuration after reset. The configuration of these pads must be kept at reset state to avoid added current consumption. 55 37 27 VSSA S Analog Ground Voltage 56 38 28 VSS_0 S Digital Ground Voltage 57 39 29 VDDA I Analog Reference Voltage for ADC 58 40 30 VDD_0 S Digital Main Supply Voltage 59 41 31 PD5 / SCI2_TDO I/O CT X XX X Port D5 LIN SCI2 Transmit Data out- put 60 42 32 RESET I/O CT Top priority non maskable interrupt. 61 43 - PD6 / AIN10 I/O CT X ei3 X X X Port D6 ADC Analog Input 10 62 44 - PD7 / AIN11 I/O CT X ei3 X X X Port D7 ADC Analog Input 11 63 - - PF6 I/O TT X XX X Port F6 64 - - PF7 I/O TT X XX X Port F7 Pin n° Pin Name Level Port Main function (after reset) Alternate function Input Output |
类似零件编号 - ST72F561K9 |
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类似说明 - ST72F561K9 |
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