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Si5345C-D-GM 数据表(PDF) 2 Page - Silicon Laboratories |
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Si5345C-D-GM 数据表(HTML) 2 Page - Silicon Laboratories |
2 / 60 page 1. Features List The Si5345/44/42 Rev D features are listed below: • Generates any combination of output frequencies from any in- put frequency • Ultra-low jitter of 90 fs rms • Input frequency range • Differential: 8 kHz–750 MHz • LVCMOS: 8 kHz–250 MHz • Output frequency range • Differential: 100 Hz to 1028 MHz • LVCMOS: 100 Hz to 250 MHz • Programmable jitter attenuation bandwidth: 0.1 Hz to 4 kHz • Meets G.8262 EEC Option 1, 2 (SyncE) • Highly configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL with programmable signal ampli- tude • Status monitoring (LOS, OOF, LOL) • Hitless input clock switching: automatic or manual • Locks to gapped clock inputs • Free-run and holdover modes • Optional zero delay mode • Fastlock feature for low nominal bandwidths • Glitchless on the fly output frequency changes • DCO mode: as low as 0.001 ppb step size • Core voltage • VDD: 1.8 V ±5% • VDDA: 3.3 V ±5% • Independent output clock supply pins • 3.3 V, 2.5 V, or 1.8 V • Serial interface: I2C or SPI • In-circuit programmable with non-volatile OTP memory • ClockBuilder Pro software simplifies device configuration • Si5345: 4 input, 10 output, 64-QFN 9×9 mm • Si5344: 4 input, 4 output, 44-QFN 7×7 mm • Si5342: 4 input, 2 output, 44-QFN 7×7 mm • Temperature range: –40 to +85 °C • Pb-free, RoHS-6 compliant Si5345/44/42 Rev D Data Sheet Features List silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 1 |
类似零件编号 - Si5345C-D-GM |
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类似说明 - Si5345C-D-GM |
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