SMJ320MCM42C, SMJ320MCM42D

DUAL SMJ320C40 MULTICHIP MODULE

SGKS001D -- JULY 1997 -- REVISED OCTOBER 2001

8

POST OFFICE BOX 1443

operational overview

Treatment of the detailed operation of the C40 device is not included in the scope of this document. See the

TMS320C4x User’s Guide (literature number SPRU063) for a detailed description of this DSP. See Figure 1 and

Figure 2 for the memory map.

000000000h

000000FFFh

000001000h

0000FFFFFh

000100000h

0001000FFh

000100100h

0001FFFFFh

000200000h

0002FF7FFh

0002FF800h

0002FFBFFh

0002FFC00h

0002FFFFFh

000300000h

0007FFFFFh

000800000h

00081FFFFh

000820000h

07FFFFFFFh

080000000h

0FFFFFFFFh

Reserved

Peripherals (internal)

Reserved

Reserved

1K RAM BLK 0 (internal)

1K RAM BLK 1 (internal)

Reserved

Local Bus Module RAM

Reserved

Global Bus (external)

(a) INTERNAL ROM DISABLED

(ROMEN = 0)

Reserved

Peripherals (internal)

Reserved

Reserved

1K RAM BLK 0 (internal)

1K RAM BLK 1 (internal)

Reserved

Local Bus Module RAM

Reserved

Global Bus (external)

(b) INTERNAL ROM ENABLED

(ROMEN = 1)

1M

4K ROM (reserved)

1M

1M

5M

128K

Structure

Depends On

ROMEN Bit

Structure

Identical

2G

2G

Figure 1. Memory Map for Each C40 Within the Multichip Module (42D)