© Semiconductor Components Industries, LLC, 2004

June, 2004 − Rev. 3

1

Publication Order Number:

MC100EP14/D

MC100EP14

3.3V / 5V1:5 Differential

ECL/PECL/HSTL Clock Driver

The MC100EP14 is a low skew 1−to−5 differential driver, designed with

clock distribution in mind, accepting two clock sources into an input

multiplexer. The ECL/PECL input signals can be either differential or

the LVEP14 is operating under PECL conditions.

The EP14 specifically guarantees low output−to−output skew. Optimal

design, layout, and processing minimize skew within a device and from

device to device.

To ensure that the tight skew specification is realized, both sides of

any differential output need to be terminated even if only one output is

being used. If an output pair is unused, both outputs may be left open

(unterminated) without affecting skew.

The common enable (EN) is synchronous, outputs are enabled/

disabled in the LOW state. This avoids a runt clock pulse when the

device is enabled/disabled as can happen with an asynchronous

control. The internal flip flop is clocked on the falling edge of the input

clock, therefore all associated specification limits are referenced to the

negative edge of the clock input.

The MC100EP14, as with most other ECL devices, can be operated

used for high performance clock distribution in 5.0 V systems.

Designers can take advantage of the EP14’s performance to distribute

low skew clocks across the backplane or the board.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

TSSOP−20

DT SUFFIX

CASE 948E

MARKING DIAGRAM*

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

http://onsemi.com

100

EP14

ALYW

1

20

*For additional marking information, refer to

Application Note AND8002/D.

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

ORDERING INFORMATION