TPIC0107B

PWM CONTROL INTELLIGENT HBRIDGE

SLIS067A − NOVEMBER 1998 − REVISED APRIL 2002

4

POST OFFICE BOX 655303

6 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LSD

TJ = 25°C

550

m

Ω

rDS(on)

Static drain-source on-resistance (per transistor)

LSD

TJ = 150°C

850

m

Ω

rDS(on)

Static drain-source on-resistance (per transistor)

I(BR) = 1 A

HSD

TJ = 25°C

600

m

Ω

I(BR) = 1 A

HSD

TJ = 150°C

870

m

Ω

I(QCD)

Open circuit detection current

10

40

100

mA

V(UVCC(OFF))

Under voltage detection on VCC, switch off voltage

See Note 1

5

V

V(UVCC(ON))

Under voltage detection on VCC, switch on voltage

See Note 1

5.2

V

V(STL)

STATUS low output voltage

IO = 100 µA, See Note 1

0.8

V

V(ST2H)

STATUS2 high output voltage

IO = 20 µA, See Note 1

3

5.4

V

I(ST(OFF))

STATUS output leakage current

V(ST) = 5 V, See Note 1

5

µA

VIL

Low level logic input voltage

−0.3

0.5

V

VIH

High level logic input voltage

3.6

7

V

∆VI

Hysteresis of input voltage

0.3

V

IIH

High level logic input current

VIH = 3.5 V

2

10

50

µA

NOTE 1: The device functions according to the function table for VCC between V(UVCC) and 5 V (no parameters specified). STATUS outputs are

not defined for VCC less than V(UVCC).