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TP3404 数据表(PDF) 3 Page - Texas Instruments

部件名 TP3404
功能描述  TP3404 Quad Digital Adapter for Subscriber Loops (QDASL)
Download  19 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TP3404 数据表(HTML) 3 Page - Texas Instruments

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NRND
TP3404
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SNOS703 – DECEMBER 2004
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified, limits printed in BOLD characters are specified for VCCA = VCCD = 5V ±5%, TA = 0°C to +70°C.
Typical characteristics are specified at VDDA = VDDD = 5.0V, TA = 25°C. All signals are referenced to GND, which is the
common of GNDA and GNDD
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DIGITAL INTERFACE TIMING
fBCLK
BCLK Frequency
4.096
4.1
MHz
tWBH,
Clock Pulse Width High
Measured from VIH to VIH
70
ns
tWBL
and Low for BCLK
Measured from VIL to VIL
70
tRB,
Rise Time and Fall Time
Measured from VIL to VIH
15
ns
tFB
of BCLK
Measured from VIH to VIL
15
tHBM
BCLK Transition to MCLK High or Low
−30
30
ns
tSFC
Set up Time, FS Valid to BCLK Invalid
20
4
ns
tHCF
Hold Time, BCLK Low to FS Invalid
40
30
ns
tSBC
Setup Time, BI Valid to BCLK Invalid
30
11
ns
tHCB
Hold Time, BCLK Valid to BI Invalid
40
7
ns
tSDC
Setup Time, DI Valid to BCLK Low
30
ns
tHCD
Hold Time, BCLK Low to DI Invalid
40
ns
tDCB
Delay Time, BCLK High to BO Valid
Load = 2 LSTTL + 100 pF
80
ns
tDCBZ
Delay Time, BCLK Low to BO High-Z
80
120
ns
tDCD
Delay Time, BCLK High to DO valid
Load = 2 LSTTL + 100 pF
80
ns
tDCZ
Delay Time, BCLK Low to DO High Impedance
40
120
ns
tDCT
Delay Time, BCLK High to TSB Low
120
ns
tZBT
Disable Time, BCLK Low to TSB High-Z
120
ns
MICROWIRE CONTROL INTERFACE TIMING
fCCLK
Frequency of CCLK
2.1
MHz
tCH
Period of CCLK High
Measured from VIH to VIH
150
ns
tCL
Period of CCLK Low
Measured from VIL to VIL
150
ns
tSSC
Setup Time, CS Low to CCLK High
50
ns
tHCS
Hold Time, CCLK High to CS Transition
40
ns
tSIC
Setup Time, CI Valid to CCLK High
50
ns
tHCI
Hold Time, CCLK High to CI Invalid
20
ns
tDCO
Delay Time, CCLK Low to CO Valid
80
ns
tDSOZ
Delay Time, CS High to CO High-Z
80
ns
tDCIZ
Delay Time, CCLK to INT High-Z
100
ns
Copyright © 2004, Texas Instruments Incorporated
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