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TDA2HG 数据表(PDF) 11 Page - Texas Instruments

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部件名 TDA2HG
功能描述  ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0
Download  426 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TDA2HG 数据表(HTML) 11 Page - Texas Instruments

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11
TDA2SX, TDA2SG
TDA2HG, TDA2HV, TDA2LF
www.ti.com
SPRS951A – DECEMBER 2015 – REVISED APRIL 2016
Submit Documentation Feedback
Product Folder Links: TDA2SX TDA2SG TDA2HG TDA2HV TDA2LF
Terminal Configuration and Functions
Copyright © 2015–2016, Texas Instruments Incorporated
D = Open drain
DS = Differential Signaling
A = Analog
PWR = Power
GND = Ground
CAP = LDO Capacitor
7. BALL RESET STATE: The state of the terminal at power-on reset:
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated)
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated)
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
8. BALL RESET REL. STATE: The state of the terminal at the deactivation of the rstoutn signal (also
mapped to the PRCM SYS_WARM_OUT_RST signal)
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated)
drive clk (OFF): The buffer drives a toggling clock (pulldown or pullup resistor not activated)
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated)
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
NOTE
For more information on the CORE_PWRON_RET_RST reset signal and its reset sources,
see the Power Reset and Clock Management / PRCM Reset Management Functional
Description section of the Device TRM.
9. RESET REL. MUXMODE: This muxmode is automatically configured at the release of the rstoutn
signal (also mapped to the PRCM SYS_WARM_OUT_RST signal).
10. IO VOLTAGE VALUE: This column describes the IO voltage value (VDDS supply).
11. POWER: The voltage supply that powers the terminal IO buffers.
12. HYS: Indicates if the input buffer is with hysteresis:
Yes: With hysteresis
No: Without hysteresis
An empty box means "Yes".
NOTE
For more information, see the hysteresis values in Section 5.7, Electrical Characteristics.
13. BUFFER TYPE: Drive strength of the associated output buffer.
NOTE
For programmable buffer strength:
The default value is given in Table 4-2.
A note describes all possible values according to the selected muxmode.
14. PULLUP / PULLDOWN TYPE: Denotes the presence of an internal pullup or pulldown resistor.
Pullup and pulldown resistors can be enabled or disabled via software.
15. DSIS: The deselected input state (DSIS) indicates the state driven on the peripheral input (logic "0" or
logic "1") when the peripheral pin function is not selected by any of the PINCNTLx registers.
0: Logic 0 driven on the peripheral's input signal port.
1: Logic 1 driven on the peripheral's input signal port.


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