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TLC1518 数据表(PDF) 10 Page - Texas Instruments |
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TLC1518 数据表(HTML) 10 Page - Texas Instruments |
10 / 39 page TLC1514, TLC1518 5-V, 10-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN SLAS252 – DECEMBER 1999 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing diagrams The timing diagrams can be categorized into two major groups: nonconversion and conversion. The nonconversion cycles are read and write (configuration). None of these cycles carry a conversion. The conversion cycles are the four modes shown in Figure 7 through Figure 14. read cycle (read FIFO or read CFR) read CFR cycle: The read command is decoded in the first 4 clocks. SDO outputs the contents of the CFR after the 4th SCLK. SCLK CS FS SDI INT EOC SDO ID14 ID13 ID12 ID15 OD11 OD10 OD9 OD4 OD3 OD2 OD1 OD0 12 3 4 5 6 713 14 15 16 1 12 ID15 Command Register Data Figure 2. TLC1514/TLC1518 Read CFR Cycle (FS active) SCLK CS FS SDI INT EOC SDO ID15 ID14 ID13 ID12 ID14 OD4 OD3 OD2 OD1 OD0 12 3 4 5 6 713 14 15 16 1 12 OD11 OD10 OD9 ID15 Command Register Data Figure 3. TLC1514/TLC1518 Read CFR Cycle (FS = 1) |
类似零件编号 - TLC1518 |
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类似说明 - TLC1518 |
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