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SI9111DY-T1 数据表(PDF) 5 Page - Vishay Siliconix |
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SI9111DY-T1 数据表(HTML) 5 Page - Vishay Siliconix |
5 / 8 page BIAS FB +VIN COMP SENSE RESET OUTPUT SHUTDOWN −VIN VREF VCC DISCHARGE OSC OUT OSC IN Dual-In-Line and SOIC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Top View Si9110/9111 Vishay Siliconix Document Number: 70004 S-42037—Rev. H, 15-Nov-04 www.vishay.com 5 PIN CONFIGURATIONS AND ORDERING INFORMATION ORDERING INFORMATION Part Number Temperature Range Package Si9110DY Si9110DY-T1 Si9110DY-T1—E3 SOIC-14 Si9111DY SOIC-14 Si9111DY-T1 −40 to 85_C Si9111DY-T1—E3 −40 to 85_C Si9110DJ Si9110DJ-—E3 PDIP 14 Si9111DJ PDIP-14 Si9111DJ-—E3 DETAILED DESCRIPTION Pre-Regulator/Start-Up Section Due to the low quiescent current requirement of the Si9110/9111 control circuitry, bias power can be supplied from the unregulated input power source, from an external regulated low-voltage supply, or from an auxiliary “bootstrap” winding on the output inductor or transformer. When power is first applied during start-up, +VIN (pin 2) will draw a constant current. The magnitude of this current is determined by a high-voltage depletion MOSFET device which is connected between +VIN and VCC (pin 6). This start-up circuitry provides initial power to the IC by charging an external bypass capacitance connected to the VCC pin. The constant current is disabled when VCC exceeds 8.6 V. If VCC is not forced to exceed the 8.6-V threshold, then VCC will be regulated to a nominal value of 8.6 V by the pre-regulator circuit. As the supply voltage rises toward the normal operating conditions, an internal undervoltage (UV) lockout circuit keeps the output driver disabled until VCC exceeds the undervoltage lockout threshold (typically 8.1 V). This guarantees that the control logic will be functioning properly and that sufficient gate drive voltage is available before the MOSFET turns on. The design of the IC is such that the undervoltage lockout threshold will be at least 300 mV less than the pre-regulator turn-off voltage. Power dissipation can be minimized by providing an external power source to VCC such that the constant current source is always disabled. Note: During start-up or when VCC drops below 8.6 V the start-up circuit is capable of sourcing up to 20 mA. This may lead to a high level of power dissipation in the IC (for a 48-V input, approximately 1 W). Excessive start-up time caused by external loading of the VCC supply can result in device damage. Figure 6 gives the typical pre-regulator current at BiC/DMOS as a function of input voltage. BIAS To properly set the bias for the Si9110/9111, a 390-kW resistor should be tied from BIAS (pin 1) to −VIN (pin 5). This determines the magnitude of bias current in all of the analog sections and the pull-up current for the SHUDOWN and RESET pins. The current flowing in the bias resistor is nominally 15 mA. Reference Section The reference section of the Si9110 consists of a temperature compensated buried zener and trimmable divider network. The output of the reference section is connected internally to the non-inverting input of the error amplifier. Nominal reference output voltage is 4 V. The trimming procedure that is used on the Si9110 brings the output of the error amplifier (which is configured for unity gain during trimming) to within "1% of 4 V. This compensates for input offset voltage in the error amplifier. The output impedance of the reference section has been purposely made high so that a low impedance external voltage source can be used to override the internal voltage source, if desired, without otherwise altering the performance of the device. |
类似零件编号 - SI9111DY-T1 |
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类似说明 - SI9111DY-T1 |
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