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TL16C2550IPFBRQ1 数据表(PDF) 1 Page - Texas Instruments |
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TL16C2550IPFBRQ1 数据表(HTML) 1 Page - Texas Instruments |
1 / 38 page TL16C2550-Q1 www.ti.com SLWS232 – DECEMBER 2011 1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS Check for Samples: TL16C2550-Q1 1 FEATURES • Qualified for Automotive Applications – Baud Generation (DC to 1 Mbit/s) • Programmable Auto-RTS and Auto-CTS • False-Start Bit Detection • In Auto-CTS Mode, CTS Controls Transmitter • Complete Status Reporting Capabilities • In Auto-RTS Mode, RCV FIFO Contents, and • 3-State Output TTL Drive Capabilities for Threshold Control RTS Bidirectional Data Bus and Control Bus • Serial and Modem Control Outputs Drive a • Line Break Generation and Detection Internal RJ11 Cable Directly When Equipment Is on the Diagnostic Capabilities: Same Power Drop – Loopback Controls for Communications • Capable of Running With All Existing Link Fault Isolation TL16C450 Software – Break, Parity, Overrun, and Framing Error • After Reset, All Registers Are Identical to the Simulation TL16C450 Register Set • Fully Prioritized Interrupt System Controls • Up to 24-MHz Clock Rate for up to 1.5-Mbaud • Modem Control Functions (CTS, RTS, DSR, Operation With VCC = 5 V DTR, RI, and DCD) • Up to 20-MHz Clock Rate for up to 1.25-Mbaud • Available in 48-Pin TQFP (PFB) Package Operation With VCC = 3.3 V • Pin Compatible with TL16C752B (48-Pin • Up to 16-MHz Clock Rate for up to 1-Mbaud Package PFB) Operation With VCC = 2.5 V • Up to 10-MHz Clock Rate for up to 625-kbaud APPLICATIONS Operation With VCC = 1.8 V • Automotive Applications • In the TL16C450 Mode, Hold and Shift • Point-of-Sale Terminals Registers Eliminate the Need for Precise • Gaming Terminals Synchronization Between the CPU and Serial • Portable Applications Data • Router Control • Programmable Baud Rate Generator Allows • Cellular Data Division of Any Input Reference Clock by 1 to (2 16 -1) and Generates an Internal 16 × Clock • Factory Automation • Standard Asynchronous Communication Bits DESCRIPTION (Start, Stop, and Parity) Added to or Deleted From the Serial Data Stream The TL16C2550 is a dual universal asynchronous receiver and transmitter (UART). It incorporates the • 5-V, 3.3-V, 2.5-V, and 1.8-V Operation functionality of two TL16C550D UARTs, each UART • Independent Receiver Clock Input having its own register set and FIFOs. The two • Transmit, Receive, Line Status, and Data Set UARTs share only the data bus interface and clock Interrupts Independently Controlled source, otherwise they operate independently. Another name for the uart function is Asynchronous • Fully Programmable Serial Interface Communications Element (ACE), and these terms will Characteristics: be used interchangeably. The bulk of this document – 5-, 6-, 7-, or 8-Bit Characters describes the behavior of each ACE, with the – Even-, Odd-, or No-Parity Bit Generation understanding that two such devices are incorporated into the TL16C2550. and Detection – 1-, 1 1/2-, or 2-Stop Bit Generation 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2011, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
类似零件编号 - TL16C2550IPFBRQ1 |
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类似说明 - TL16C2550IPFBRQ1 |
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