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SN74LVC1G17DCKT 数据表(PDF) 11 Page - Texas Instruments |
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SN74LVC1G17DCKT 数据表(HTML) 11 Page - Texas Instruments |
11 / 39 page SN74LVC1G17 R ~2.2 M F R ~1 k S C 50 pF C 16 pF L C ~32 pF 1 C ~32 pF 2 SN74LVC1G17 www.ti.com SCES351V – JULY 2001 – REVISED APRIL 2014 10 Applications and Implementation 10.1 Application Information The SN74LVC1G14 is a high drive CMOS device that can be used for a multitude of buffer type functions where the input is slow or noisy. It can produce 24 mA of drive current at 3.3 V making it Ideal for driving multiple outputs and good for high speed applications up to 100 MHz. The inputs are 5.5 V tolerant allowing it to translate down to VCC. 10.2 Typical Application 10.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing. 10.2.2 Detailed Design Procedure 1. Recommended Input Conditions – Rise time and fall time specs. See ( Δt/ΔV) in the Recommended Operating Conditions table. – Specified high and low levels. See (VIH and VIL) in the Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the Recommended Operating Conditions table at any valid VCC . 2. Recommend Output Conditions – Load currents should not exceed (IO max) per output and should not exceed (continuous current through VCC or GND) total current for the part. These limits are located in the Absolute Max Ratings table. – Outputs should not be pulled above VCC. Copyright © 2001–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: SN74LVC1G17 |
类似零件编号 - SN74LVC1G17DCKT |
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类似说明 - SN74LVC1G17DCKT |
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