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STA310 数据表(PDF) 2 Page - STMicroelectronics |
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STA310 数据表(HTML) 2 Page - STMicroelectronics |
2 / 90 page STA310 2/90 2 STA310 AUDIO DECODER PIN DESCRIPTION Pin Number Name Type Function CONTROL INTERFACES 48 IRQB O (1) Interrupt Signal (level), active low 47 SELI2C I (2) Selects the Control Interface (when high: serial interface; when low: parallel interface) I 2C Control Interface 43 SDAI2C I/O (1) I 2C Serial Data 46 SCLKI2C I I 2C Clock 53 MAINI2CADR I (2) Determines the slave address Parallel Control Interface 78 - 79 - 80 - 1 2 - 3 - 6 - 7 D0 - D1 - D2 - D3 D4 - D5 - D6 - D7 I/O Host Data 12 - 13 - 14 - 15 16 - 18 - 19 - 20 A0 - A1 - A2 - A3 A4 - A5 - A6 - A7 I Host Address 21 DCSB I Chip Select, active low 22 R/W I Read/Write Selection: read access when high, write access when low 35 WAITB O (3) Data Acknowledge, active low DATA INPUT INTERFACE First Serial Data Interface (I2S) 37 DSTRB I Clock Input Data, active low 41 SIN I Serial Input Data 40 LRCLKIN I Word Clock for the Input 42 REQ O Handshake for the Data Transfer, aconfigurable by the SIN_SETUP register Second Serial Data Interface (I2S) 62 DSTRB2 I Clock Input Data, active low 60 SIN2 I Serial Input Data 61 LRCLKIN2 I Word Clock for the Input 63 REQ2 O Handshake for the Data Transfer, active low DATA OUTPUT INTERFACES 69 PCMCLK I/O Oversampling Clock input for STA310 when generated externally DAC Interface 67 SCLK O Bit Clock for the DAC |
类似零件编号 - STA310 |
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类似说明 - STA310 |
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