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LM3687 数据表(PDF) 8 Page - Texas Instruments |
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LM3687 数据表(HTML) 8 Page - Texas Instruments |
8 / 30 page DC-DC Converter Linear Regulator VBATT SW PGND FB VIN_LIN VOUT_LIN SGND EN_DCDC EN_LIN Startup LDO Mode Switch VIN_LIN > VREF + 200 mV LM3687 SNVS473B – DECEMBER 2007 – REVISED MAY 2013 www.ti.com Electrical Characteristics: External Components, Recommended Specification (1) (2) (3) Limit Symbol Parameter Conditions Value Units Min Max Output Capacitance for CVOUT_LIN linear regulator 2.2 1.5 10 µF VIN_LIN is biased separately, not by Input Capacitance for CVIN_LIN VOUT_DCDC (no CVIN_LIN needed for linear regulator post regulation application) 1.0 0.47 µF Input Capacitance for DC- CVBATT DC converter 4.7 µF DC-DC converter output CVOUT_DCDC filter capacitor 10 µF CESR ESR of all capacitors 0.003 0.300 Ω Inductance 2.2 µH L ISAT 1.6 A DCR 200 m Ω (1) All voltages are with respect to the potential at the SGND pin. (2) Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Unless otherwise specified, conditions for typ. specifications are: VBATT = 3.6V and TA = 25°C. (3) The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered when selecting a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is X7R. However, dependent on application, X5R, Y5V, and Z5U can also be used. The shown minimum limit represents real minimum capacitance, including all tolerances and must be maintained over temperature and dc bias voltage (See CAPACITOR CHARACTERISTICS) BLOCK DIAGRAM Figure 4. Simplified Block Diagram 8 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LM3687 |
类似零件编号 - LM3687_15 |
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类似说明 - LM3687_15 |
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