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AT86ZL3201 数据表(PDF) 2 Page - ATMEL Corporation |
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AT86ZL3201 数据表(HTML) 2 Page - ATMEL Corporation |
2 / 4 page 2 AT86ZL3201 5056CS–WIRE–6/04 In addition to many powerful features commonly found on Atmel’s AVR microcontrollers, the Z-Link Controller includes a 128-bit Advanced Encryption Standard (AES) engine and a NIST-certified random number generator to provide low-cost, low-power network security that conserves program space. With buffered TX and RX ports, two SPI serial interface blocks, 32 general purpose I/O with programmable pull-ups, numerous clock- ing options, and a high-speed clock output, the Z-Link Controller is designed with a flexible interface to support both low-band (868/915 MHz) and high-band (2.4 GHz) radio solutions. For power conservation, the Z-Link Controller includes two sleep modes, a power-down mode for the ADC, and a programmable brown-out detector. In sleep mode, one 16-bit timer can be running with the extremely low-power 32-kHz oscillator (max. 1uW), and all analog blocks have low-power, standby modes. The Z-Link Controller includes many features to aide in software development, including a JTAG-compliant interface for on-chip debug and flash programming, and four 16-bit timers. The 32 KB Flash can be programmed in the system via the built-in bootloader using data directly from either SPI interface or via ROM-code using data from some other source such as RF data (for over-the-air programming). Code security options include the ability to establish a variable-sized, protected section of Flash memory and the abil- ity to lock out JTAG access. The Z-Link Controller will include a proven IEEE 802.15.4 software stack including both the PHY and the MAC protocol layers. In addition, the Z-Link Controller will be sup- ported with a full suite of program and system development tools including C compiler, macro assembler, progam debugger/simulator, in-circuit emulator, and an evaluation kit. |
类似零件编号 - AT86ZL3201 |
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类似说明 - AT86ZL3201 |
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