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DP8390D 数据表(PDF) 34 Page - Texas Instruments

部件名 DP8390D
功能描述  NIC Network Interface Controller
Download  58 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

DP8390D 数据表(HTML) 34 Page - Texas Instruments

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130 Bus Arbitration and Timing
The NIC operates in three possible modes
TLF8582 – 64
Upon power-up the NIC is in an indeterminant state After
receiving a Hardware Reset the NIC comes up as a slave in
the Reset State The receiver and transmitter are both dis-
abled in this state The reset state can be reentered under
three conditions soft reset (Stop Command) hard reset
(RESET input) or an error that shuts down the receiver or
transmitter (FIFO underflow or overflow) After initialization
of registers the NIC is issued a Start command and the NIC
enters Idle state Until the DMA is required the NIC remains
in an idle state The idle state is exited by a request from the
FIFO in the case of receive or transmit or from the Remote
DMA in the case of Remote DMA operation After acquiring
the bus in a BREQBACK handshake the Remote or Local
DMA transfer is completed and the NIC reenters the idle
state
DMA TRANSFERS TIMING
The DMA can be programmed for the following types of
transfers
16-Bit Address 8-bit Data Transfer
16-Bit Address 16-bit Data Transfer
32-Bit Address 8-bit Data Transfer
32-Bit Address 16-bit Data Transfer
All DMA transfers use BSCK for timing 16-Bit Address
modes require 4 BSCK cycles as shown below
16-Bit Address 8-Bit Data
TLF8582 – 65
33


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