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CDCM1802RGTRG4 数据表(PDF) 9 Page - Texas Instruments |
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CDCM1802RGTRG4 数据表(HTML) 9 Page - Texas Instruments |
9 / 30 page CDCM1802 LVCMOS Y1 1 lQ 1 lQ 10 pF VDD Y0 Y0 |Y0 t Y0| VOUT(pp) 80% 0 V 20% tf tr VOH VOL tPHLO 0.5 x VDD1 tskLVCMOS(o) IN IN Y0 Y0 Y1 CDCM1802 www.ti.com SCAS759B – APRIL 2004 – REVISED NOVEMBER 2015 7 Parameter Measurement Information A. Part-to-part skew, tsk(pp), is calculated as the greater of: M − The difference between the fastest and the slowest tpd(LH)n across multiple devices M − The difference between the fastest and the slowest tpd(HL)n across multiple devices B. Pulse skew, tsk(p), is calculated as the magnitude of the absolute time difference between the high-to-low (tpd(HL) and the low-to-high (tpd(LH)) propagation delays when a single switching input causes Y0 to switch, tsk(p) = | tpd(HL) − tpd(LH) |. Pulse skew is sometimes referred to as pulse width distortion or duty cycle skew. Figure 7. Waveforms for Calculation of tsk(o) and tsk(pp) Figure 8. LVPECL Differential Output Voltage and Rise and Fall Time Figure 9. LVCMOS Output Loading During Device Test Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: CDCM1802 |
类似零件编号 - CDCM1802RGTRG4 |
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类似说明 - CDCM1802RGTRG4 |
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